An All-Digital Self-Calibration Method for a Vernier-Based Time-to-Digital Converter
This paper presents a new calibration method for a Vernier-based time-to-digital converter (TDC). In the proposed method, delay lines in the TDC are configured as on-chip ring oscillators for generating a sequence of time events. These time events are applied to the TDC in the calibration mode, and...
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| Veröffentlicht in: | IEEE transactions on instrumentation and measurement 2010-02, Vol.59 (2), p.463-469 |
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| container_title | IEEE transactions on instrumentation and measurement |
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| creator | Rashidzadeh, R. Ahmadi, M. Miller, W.C. |
| description | This paper presents a new calibration method for a Vernier-based time-to-digital converter (TDC). In the proposed method, delay lines in the TDC are configured as on-chip ring oscillators for generating a sequence of time events. These time events are applied to the TDC in the calibration mode, and then, the probability distribution of output codes is determined. The variations of the quantization step and the actual transfer characteristic representing the TDC are estimated through statistical analysis of the output codes. The proposed method eliminates the need for accurate external sources typically used for TDC calibration. Simulation and experimental results using a field-programmable gate array platform indicate that the method can successfully be employed to calibrate high-resolution TDCs with reasonable accuracy. |
| doi_str_mv | 10.1109/TIM.2009.2024699 |
| format | Article |
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Simulation and experimental results using a field-programmable gate array platform indicate that the method can successfully be employed to calibrate high-resolution TDCs with reasonable accuracy.</description><subject>Calibration</subject><subject>Converters</subject><subject>Delay effects</subject><subject>Delay lines</subject><subject>Flip-flops</subject><subject>Instrumentation</subject><subject>Integrated circuit measurements</subject><subject>Integrated circuit synthesis</subject><subject>Oscillators</subject><subject>Phase locked loops</subject><subject>phase-locked loop (PLL)</subject><subject>Platforms</subject><subject>Ring oscillators</subject><subject>Simulation</subject><subject>Statistical analysis</subject><subject>time-to-digital converter (TDC)</subject><subject>Timing</subject><subject>Vernier delay line (VDL)</subject><issn>0018-9456</issn><issn>1557-9662</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqFkT1PwzAQhi0EEuVjR2KJWJhczo7t2GMpX5WKGAisltNcwFUaFztF4t8TVNSBheXe4Z73pNNDyBmDMWNgrsrZ45gDmGFwoYzZIyMmZUGNUnyfjACYpkZIdUiOUloCQKFEMSLlpMsmbUtv_JvvXZs9Y9vQqWt9FV3vQ5c9Yv8e6qwJMXPZK8bOY6TXLmGdlX6FtA-77jR0nxh7jCfkoHFtwtPfPCYvd7fl9IHOn-5n08mcLgSHnjZV41yzqEAwl7OcAWBTgZJSGyUqBcPSsdqBqyFXOdbOSOBGI9e8qgUU-TG53N5dx_CxwdTblU8LbFvXYdgkq5XRQoKCf8lC5gUXTPGBvPhDLsMmdsMbVkslhFZMDhBsoUUMKUVs7Dr6lYtfloH90WEHHfZHh_3VMVTOtxWPiDtccqmY0vk31cCEZQ</recordid><startdate>201002</startdate><enddate>201002</enddate><creator>Rashidzadeh, R.</creator><creator>Ahmadi, M.</creator><creator>Miller, W.C.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| ispartof | IEEE transactions on instrumentation and measurement, 2010-02, Vol.59 (2), p.463-469 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Calibration Converters Delay effects Delay lines Flip-flops Instrumentation Integrated circuit measurements Integrated circuit synthesis Oscillators Phase locked loops phase-locked loop (PLL) Platforms Ring oscillators Simulation Statistical analysis time-to-digital converter (TDC) Timing Vernier delay line (VDL) |
| title | An All-Digital Self-Calibration Method for a Vernier-Based Time-to-Digital Converter |
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