Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs
In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined \textit{Y...
Gespeichert in:
Veröffentlicht in: | IEEE transactions on electron devices 2023-01, Vol.70 (1), p.1-7 |
---|---|
Hauptverfasser: | , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 7 |
---|---|
container_issue | 1 |
container_start_page | 1 |
container_title | IEEE transactions on electron devices |
container_volume | 70 |
creator | Cretu, Bogdan Veloso, Anabela Simoen, Eddy |
description | In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined \textit{Y} -function methodology, the main advantage being that no extra iterative steps are necessary. The results are confirmed using other derivative dc parameter estimation methodologies. Low-frequency noise measurements evidence variability of the flat-band voltage noise and correlation between the noise level and the low field mobility. The dominant flicker noise mechanism is related to the correlated mobility and carrier number fluctuation mechanism with access resistance noise contribution in very strong inversion. The impact of the access resistance on the estimation of the Coulomb scattering coefficient is evidenced. |
doi_str_mv | 10.1109/TED.2022.3225248 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TED_2022_3225248</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9982550</ieee_id><sourcerecordid>2759387392</sourcerecordid><originalsourceid>FETCH-LOGICAL-c297t-7c088f5089de7cfd9fec3aabd0d3574d66e62a06834814385a6e3f38bae0507d3</originalsourceid><addsrcrecordid>eNo9kUFPGzEQha2qSE2hd6ReLHHqYVOvvV7bR7RAqRSBBIGrNXhnG8NmndpOq_TaP16nQZxGM_rem9E8Qk5rNq9rZr4uLy_mnHE-F5xL3uh3ZFZLqSrTNu17MmOs1pURWnwgH1N6Lm3bNHxG_t7h4Cfs6UVHYerpIvyuriL-3OLkdvQm-IS0W0EElzH6P5B9mChkehfC-r-gi7vwAyfv6BLXG4yQtxETDQN9xJi9g3Hc0fsM7qUsufejd8XgBqaQVoiZXl0u0wk5GmBM-Om1HpOHMu6uq8Xtt-_d-aJy3KhcKce0HiTTpkflht4M6ATAU896IVXTty22HFirRaPrRmgJLYpB6CdAJpnqxTH5cvBdwWg30a8h7mwAb6_PF3Y_Y40QUiv9qy7s2YHdxFCekbJ9Dts4lfMsV7I8UgnDC8UOlIshpYjDm23N7D4WW2Kx-1jsayxF8vkg8Yj4hhujuZRM_APyh4jk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2759387392</pqid></control><display><type>article</type><title>Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs</title><source>IEEE Electronic Library (IEL)</source><creator>Cretu, Bogdan ; Veloso, Anabela ; Simoen, Eddy</creator><creatorcontrib>Cretu, Bogdan ; Veloso, Anabela ; Simoen, Eddy</creatorcontrib><description>In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined <inline-formula> <tex-math notation="LaTeX">\textit{Y}</tex-math> </inline-formula>-function methodology, the main advantage being that no extra iterative steps are necessary. The results are confirmed using other derivative dc parameter estimation methodologies. Low-frequency noise measurements evidence variability of the flat-band voltage noise and correlation between the noise level and the low field mobility. The dominant flicker noise mechanism is related to the correlated mobility and carrier number fluctuation mechanism with access resistance noise contribution in very strong inversion. The impact of the access resistance on the estimation of the Coulomb scattering coefficient is evidenced.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2022.3225248</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject><inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> textit{Y}</tex-math> </inline-formula> function ; Cryogenic temperature ; Electrical parameters ; Engineering Sciences ; Estimation ; flicker noise ; Gallium arsenide ; gate-all-around (GAA) nanosheet (NS) FET ; Iterative methods ; LF noise ; Liquid nitrogen ; Logic gates ; low-frequency noise ; Mathematical models ; Micro and nanotechnologies ; Microelectronics ; Nanosheets ; Noise levels ; Parameter estimation ; Parameter extraction ; Resistance ; Silicon ; Threshold voltage</subject><ispartof>IEEE transactions on electron devices, 2023-01, Vol.70 (1), p.1-7</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c297t-7c088f5089de7cfd9fec3aabd0d3574d66e62a06834814385a6e3f38bae0507d3</citedby><cites>FETCH-LOGICAL-c297t-7c088f5089de7cfd9fec3aabd0d3574d66e62a06834814385a6e3f38bae0507d3</cites><orcidid>0000-0002-5218-4046 ; 0000-0001-7546-0261 ; 0000-0002-2727-4605</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9982550$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>230,314,776,780,792,881,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9982550$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttps://hal.science/hal-04335878$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Cretu, Bogdan</creatorcontrib><creatorcontrib>Veloso, Anabela</creatorcontrib><creatorcontrib>Simoen, Eddy</creatorcontrib><title>Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined <inline-formula> <tex-math notation="LaTeX">\textit{Y}</tex-math> </inline-formula>-function methodology, the main advantage being that no extra iterative steps are necessary. The results are confirmed using other derivative dc parameter estimation methodologies. Low-frequency noise measurements evidence variability of the flat-band voltage noise and correlation between the noise level and the low field mobility. The dominant flicker noise mechanism is related to the correlated mobility and carrier number fluctuation mechanism with access resistance noise contribution in very strong inversion. The impact of the access resistance on the estimation of the Coulomb scattering coefficient is evidenced.</description><subject><inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> textit{Y}</tex-math> </inline-formula> function</subject><subject>Cryogenic temperature</subject><subject>Electrical parameters</subject><subject>Engineering Sciences</subject><subject>Estimation</subject><subject>flicker noise</subject><subject>Gallium arsenide</subject><subject>gate-all-around (GAA) nanosheet (NS) FET</subject><subject>Iterative methods</subject><subject>LF noise</subject><subject>Liquid nitrogen</subject><subject>Logic gates</subject><subject>low-frequency noise</subject><subject>Mathematical models</subject><subject>Micro and nanotechnologies</subject><subject>Microelectronics</subject><subject>Nanosheets</subject><subject>Noise levels</subject><subject>Parameter estimation</subject><subject>Parameter extraction</subject><subject>Resistance</subject><subject>Silicon</subject><subject>Threshold voltage</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kUFPGzEQha2qSE2hd6ReLHHqYVOvvV7bR7RAqRSBBIGrNXhnG8NmndpOq_TaP16nQZxGM_rem9E8Qk5rNq9rZr4uLy_mnHE-F5xL3uh3ZFZLqSrTNu17MmOs1pURWnwgH1N6Lm3bNHxG_t7h4Cfs6UVHYerpIvyuriL-3OLkdvQm-IS0W0EElzH6P5B9mChkehfC-r-gi7vwAyfv6BLXG4yQtxETDQN9xJi9g3Hc0fsM7qUsufejd8XgBqaQVoiZXl0u0wk5GmBM-Om1HpOHMu6uq8Xtt-_d-aJy3KhcKce0HiTTpkflht4M6ATAU896IVXTty22HFirRaPrRmgJLYpB6CdAJpnqxTH5cvBdwWg30a8h7mwAb6_PF3Y_Y40QUiv9qy7s2YHdxFCekbJ9Dts4lfMsV7I8UgnDC8UOlIshpYjDm23N7D4WW2Kx-1jsayxF8vkg8Yj4hhujuZRM_APyh4jk</recordid><startdate>20230101</startdate><enddate>20230101</enddate><creator>Cretu, Bogdan</creator><creator>Veloso, Anabela</creator><creator>Simoen, Eddy</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>1XC</scope><orcidid>https://orcid.org/0000-0002-5218-4046</orcidid><orcidid>https://orcid.org/0000-0001-7546-0261</orcidid><orcidid>https://orcid.org/0000-0002-2727-4605</orcidid></search><sort><creationdate>20230101</creationdate><title>Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs</title><author>Cretu, Bogdan ; Veloso, Anabela ; Simoen, Eddy</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c297t-7c088f5089de7cfd9fec3aabd0d3574d66e62a06834814385a6e3f38bae0507d3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic><inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> textit{Y}</tex-math> </inline-formula> function</topic><topic>Cryogenic temperature</topic><topic>Electrical parameters</topic><topic>Engineering Sciences</topic><topic>Estimation</topic><topic>flicker noise</topic><topic>Gallium arsenide</topic><topic>gate-all-around (GAA) nanosheet (NS) FET</topic><topic>Iterative methods</topic><topic>LF noise</topic><topic>Liquid nitrogen</topic><topic>Logic gates</topic><topic>low-frequency noise</topic><topic>Mathematical models</topic><topic>Micro and nanotechnologies</topic><topic>Microelectronics</topic><topic>Nanosheets</topic><topic>Noise levels</topic><topic>Parameter estimation</topic><topic>Parameter extraction</topic><topic>Resistance</topic><topic>Silicon</topic><topic>Threshold voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Cretu, Bogdan</creatorcontrib><creatorcontrib>Veloso, Anabela</creatorcontrib><creatorcontrib>Simoen, Eddy</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Hyper Article en Ligne (HAL)</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Cretu, Bogdan</au><au>Veloso, Anabela</au><au>Simoen, Eddy</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2023-01-01</date><risdate>2023</risdate><volume>70</volume><issue>1</issue><spage>1</spage><epage>7</epage><pages>1-7</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined <inline-formula> <tex-math notation="LaTeX">\textit{Y}</tex-math> </inline-formula>-function methodology, the main advantage being that no extra iterative steps are necessary. The results are confirmed using other derivative dc parameter estimation methodologies. Low-frequency noise measurements evidence variability of the flat-band voltage noise and correlation between the noise level and the low field mobility. The dominant flicker noise mechanism is related to the correlated mobility and carrier number fluctuation mechanism with access resistance noise contribution in very strong inversion. The impact of the access resistance on the estimation of the Coulomb scattering coefficient is evidenced.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2022.3225248</doi><tpages>7</tpages><orcidid>https://orcid.org/0000-0002-5218-4046</orcidid><orcidid>https://orcid.org/0000-0001-7546-0261</orcidid><orcidid>https://orcid.org/0000-0002-2727-4605</orcidid><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0018-9383 |
ispartof | IEEE transactions on electron devices, 2023-01, Vol.70 (1), p.1-7 |
issn | 0018-9383 1557-9646 |
language | eng |
recordid | cdi_crossref_primary_10_1109_TED_2022_3225248 |
source | IEEE Electronic Library (IEL) |
subjects | <inline-formula xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <tex-math notation="LaTeX"> textit{Y}</tex-math> </inline-formula> function Cryogenic temperature Electrical parameters Engineering Sciences Estimation flicker noise Gallium arsenide gate-all-around (GAA) nanosheet (NS) FET Iterative methods LF noise Liquid nitrogen Logic gates low-frequency noise Mathematical models Micro and nanotechnologies Microelectronics Nanosheets Noise levels Parameter estimation Parameter extraction Resistance Silicon Threshold voltage |
title | Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T10%3A24%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Refined%20DC%20and%20Low-Frequency%20Noise%20Characterization%20at%20Room%20and%20Cryogenic%20Temperatures%20of%20Vertically%20Stacked%20Silicon%20Nanosheet%20FETs&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Cretu,%20Bogdan&rft.date=2023-01-01&rft.volume=70&rft.issue=1&rft.spage=1&rft.epage=7&rft.pages=1-7&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2022.3225248&rft_dat=%3Cproquest_RIE%3E2759387392%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2759387392&rft_id=info:pmid/&rft_ieee_id=9982550&rfr_iscdi=true |