Short-Channel Top-Gate InGaZnO Thin-Film Transistors Fabricated With Boron Implantation Into Source/Drain Regions
In this brief, we discuss top-gate InGaZnO thin-film transistors (InGaZnO TFTs) fabricated with boron (B) implantation into the source-drain regions, focusing on channel shortening. B was implanted through the gate insulator into the InGaZnO layer. From scanning capacitance microscopy (SCM) analysis...
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| Veröffentlicht in: | IEEE transactions on electron devices 2021-08, Vol.68 (8), p.4161-4163 |
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| container_title | IEEE transactions on electron devices |
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| creator | Takechi, Kazushige Lin, Feipeng He, Shui Yuan, Yong Tanaka, Jun Sera, Kenji |
| description | In this brief, we discuss top-gate InGaZnO thin-film transistors (InGaZnO TFTs) fabricated with boron (B) implantation into the source-drain regions, focusing on channel shortening. B was implanted through the gate insulator into the InGaZnO layer. From scanning capacitance microscopy (SCM) analysis, we found that boron implantation in the S/D regions of InGaZnO TFTs induces channel shortening. We also found that such channel shortening is suppressed by optimizing acceleration voltage in the boron implantation process, leading to good operation in short-channel ( 1.5~\mu \text{m} ) InGaZnO TFT. |
| doi_str_mv | 10.1109/TED.2021.3091420 |
| format | Article |
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B was implanted through the gate insulator into the InGaZnO layer. From scanning capacitance microscopy (SCM) analysis, we found that boron implantation in the S/D regions of InGaZnO TFTs induces channel shortening. We also found that such channel shortening is suppressed by optimizing acceleration voltage in the boron implantation process, leading to good operation in short-channel (<inline-formula> <tex-math notation="LaTeX">1.5~\mu \text{m} </tex-math></inline-formula>) InGaZnO TFT.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2021.3091420</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Boron ; Boron implantation ; channel shortening ; Electron devices ; Implantation ; Indium gallium zinc oxide ; InGaZnO ; Ion implantation ; Logic gates ; Plasmas ; Semiconductor devices ; Thin film transistors ; thin-film transistor (TFT) ; top gate ; Transistors</subject><ispartof>IEEE transactions on electron devices, 2021-08, Vol.68 (8), p.4161-4163</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2021</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-eeefbd6c1bb7e3992a7fb68359e0f6bd7f9f1d41204433ca545b09036bce61263</citedby><cites>FETCH-LOGICAL-c291t-eeefbd6c1bb7e3992a7fb68359e0f6bd7f9f1d41204433ca545b09036bce61263</cites><orcidid>0000-0001-9431-6441 ; 0000-0002-7632-1789 ; 0000-0001-5312-2536</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9472971$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9472971$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Takechi, Kazushige</creatorcontrib><creatorcontrib>Lin, Feipeng</creatorcontrib><creatorcontrib>He, Shui</creatorcontrib><creatorcontrib>Yuan, Yong</creatorcontrib><creatorcontrib>Tanaka, Jun</creatorcontrib><creatorcontrib>Sera, Kenji</creatorcontrib><title>Short-Channel Top-Gate InGaZnO Thin-Film Transistors Fabricated With Boron Implantation Into Source/Drain Regions</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>In this brief, we discuss top-gate InGaZnO thin-film transistors (InGaZnO TFTs) fabricated with boron (B) implantation into the source-drain regions, focusing on channel shortening. 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We also found that such channel shortening is suppressed by optimizing acceleration voltage in the boron implantation process, leading to good operation in short-channel (<inline-formula> <tex-math notation="LaTeX">1.5~\mu \text{m} </tex-math></inline-formula>) InGaZnO TFT.</description><subject>Boron</subject><subject>Boron implantation</subject><subject>channel shortening</subject><subject>Electron devices</subject><subject>Implantation</subject><subject>Indium gallium zinc oxide</subject><subject>InGaZnO</subject><subject>Ion implantation</subject><subject>Logic gates</subject><subject>Plasmas</subject><subject>Semiconductor devices</subject><subject>Thin film transistors</subject><subject>thin-film transistor (TFT)</subject><subject>top gate</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kN1LwzAUxYMoOKfvgi8Bn7vlq-nyqHObg8HAVQRfStqmNqNLuiR78L83ZcOny-Gec-_hB8AjRhOMkZjmi7cJQQRPKBKYEXQFRjhNs0Rwxq_BCCE8SwSd0Vtw5_0-Ss4YGYHjrrUuJPNWGqM6mNs-Wcmg4Nqs5LfZwrzVJlnq7gBzJ43XPljn4VKWTlfRV8MvHVr4ap01cH3oO2mCDHoQJli4sydXqembk9rAD_UTF_4e3DSy8-rhMsfgc7nI5-_JZrtaz182SUUEDolSqilrXuGyzBQVgsisKfmMpkKhhpd11ogG1wwTxBillUxZWiKBKC8rxTHhdAyez3d7Z48n5UOxj21MfFmQNJIh6RAcA3R2Vc5671RT9E4fpPstMCoGsEUEWwxgiwvYGHk6R3Ts-G8XLCMiw_QPVrB0bQ</recordid><startdate>20210801</startdate><enddate>20210801</enddate><creator>Takechi, Kazushige</creator><creator>Lin, Feipeng</creator><creator>He, Shui</creator><creator>Yuan, Yong</creator><creator>Tanaka, Jun</creator><creator>Sera, Kenji</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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B was implanted through the gate insulator into the InGaZnO layer. From scanning capacitance microscopy (SCM) analysis, we found that boron implantation in the S/D regions of InGaZnO TFTs induces channel shortening. We also found that such channel shortening is suppressed by optimizing acceleration voltage in the boron implantation process, leading to good operation in short-channel (<inline-formula> <tex-math notation="LaTeX">1.5~\mu \text{m} </tex-math></inline-formula>) InGaZnO TFT.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2021.3091420</doi><tpages>3</tpages><orcidid>https://orcid.org/0000-0001-9431-6441</orcidid><orcidid>https://orcid.org/0000-0002-7632-1789</orcidid><orcidid>https://orcid.org/0000-0001-5312-2536</orcidid></addata></record> |
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| subjects | Boron Boron implantation channel shortening Electron devices Implantation Indium gallium zinc oxide InGaZnO Ion implantation Logic gates Plasmas Semiconductor devices Thin film transistors thin-film transistor (TFT) top gate Transistors |
| title | Short-Channel Top-Gate InGaZnO Thin-Film Transistors Fabricated With Boron Implantation Into Source/Drain Regions |
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