Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors
The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, P...
Gespeichert in:
Veröffentlicht in: | IEEE transactions on electron devices 2018-12, Vol.65 (12), p.5365-5372 |
---|---|
Hauptverfasser: | , , , , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | 5372 |
---|---|
container_issue | 12 |
container_start_page | 5365 |
container_title | IEEE transactions on electron devices |
container_volume | 65 |
creator | Stockman, Arno Masin, Fabrizio Meneghini, Matteo Zanoni, Enrico Meneghesso, Gaudenzio Bakeroot, Benoit Moens, Peter |
description | The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole-Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN "p-i-n" diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at {t}_{\textsf {1}\%}=\textsf {10} years. |
doi_str_mv | 10.1109/TED.2018.2877262 |
format | Article |
fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TED_2018_2877262</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8525132</ieee_id><sourcerecordid>2137554781</sourcerecordid><originalsourceid>FETCH-LOGICAL-c399t-f18940fa0d4580665efa9000bab5e9996005a1b709f49c5f3ee9ebd5021ff40f3</originalsourceid><addsrcrecordid>eNo9kE1PAjEQhhujiYjeTbw08bzQj-3u9kgQwQT0guemuzuFkmWLbTnw7y1CPEwmk3mfmeRB6JmSEaVEjteztxEjtBqxqixZwW7QgApRZrLIi1s0IGmVSV7xe_QQwi6NRZ6zAdrMdQQ8dX17bKJ1PV5Bs9W9DfuAdd_ipTUQ7R7wyrXQ2X6DncGH7I-adHP9OU6FF3azzWYdNNG7Plu52nY2nvDa6z7YEJ0Pj-jO6C7A07UP0ff7bD1dZMuv-cd0sswaLmXMDK1kTowmbS4qUhQCjJaEkFrXAqSUBSFC07ok0uSyEYYDSKhbQRg1JoF8iF4vdw_e_RwhRLVzR9-nl4pRXgqRlxVNKXJJNd6F4MGog7d77U-KEnXWqZJOddaprjoT8nJBLAD8xyvBBOWM_wKpbnBP</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2137554781</pqid></control><display><type>article</type><title>Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors</title><source>IEEE Electronic Library (IEL)</source><creator>Stockman, Arno ; Masin, Fabrizio ; Meneghini, Matteo ; Zanoni, Enrico ; Meneghesso, Gaudenzio ; Bakeroot, Benoit ; Moens, Peter</creator><creatorcontrib>Stockman, Arno ; Masin, Fabrizio ; Meneghini, Matteo ; Zanoni, Enrico ; Meneghesso, Gaudenzio ; Bakeroot, Benoit ; Moens, Peter</creatorcontrib><description>The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole-Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN "p-i-n" diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at <inline-formula> <tex-math notation="LaTeX">{t}_{\textsf {1}\%}=\textsf {10} </tex-math></inline-formula> years.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2018.2877262</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Aluminum gallium nitride ; Aluminum gallium nitrides ; Bias ; Conduction mechanism ; Current measurement ; Dislocations ; Electric potential ; enhancement mode ; Gallium nitride ; gallium nitride (GaN) ; Gallium nitrides ; High electron mobility transistors ; high-electron-mobility transistor (HEMT) ; Logic gates ; p-GaN gate ; Passivation ; Schottky diodes ; Semiconductor devices ; Service life assessment ; Temperature dependence ; Thermionic emission ; time-dependent breakdown (TDB) ; Transistors ; Wide band gap semiconductors</subject><ispartof>IEEE transactions on electron devices, 2018-12, Vol.65 (12), p.5365-5372</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c399t-f18940fa0d4580665efa9000bab5e9996005a1b709f49c5f3ee9ebd5021ff40f3</citedby><cites>FETCH-LOGICAL-c399t-f18940fa0d4580665efa9000bab5e9996005a1b709f49c5f3ee9ebd5021ff40f3</cites><orcidid>0000-0001-7349-9656 ; 0000-0003-2421-505X ; 0000-0002-8992-4685 ; 0000-0002-6947-1797 ; 0000-0002-6715-4827 ; 0000-0003-4392-1777</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8525132$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8525132$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Stockman, Arno</creatorcontrib><creatorcontrib>Masin, Fabrizio</creatorcontrib><creatorcontrib>Meneghini, Matteo</creatorcontrib><creatorcontrib>Zanoni, Enrico</creatorcontrib><creatorcontrib>Meneghesso, Gaudenzio</creatorcontrib><creatorcontrib>Bakeroot, Benoit</creatorcontrib><creatorcontrib>Moens, Peter</creatorcontrib><title>Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole-Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN "p-i-n" diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at <inline-formula> <tex-math notation="LaTeX">{t}_{\textsf {1}\%}=\textsf {10} </tex-math></inline-formula> years.</description><subject>Aluminum gallium nitride</subject><subject>Aluminum gallium nitrides</subject><subject>Bias</subject><subject>Conduction mechanism</subject><subject>Current measurement</subject><subject>Dislocations</subject><subject>Electric potential</subject><subject>enhancement mode</subject><subject>Gallium nitride</subject><subject>gallium nitride (GaN)</subject><subject>Gallium nitrides</subject><subject>High electron mobility transistors</subject><subject>high-electron-mobility transistor (HEMT)</subject><subject>Logic gates</subject><subject>p-GaN gate</subject><subject>Passivation</subject><subject>Schottky diodes</subject><subject>Semiconductor devices</subject><subject>Service life assessment</subject><subject>Temperature dependence</subject><subject>Thermionic emission</subject><subject>time-dependent breakdown (TDB)</subject><subject>Transistors</subject><subject>Wide band gap semiconductors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE1PAjEQhhujiYjeTbw08bzQj-3u9kgQwQT0guemuzuFkmWLbTnw7y1CPEwmk3mfmeRB6JmSEaVEjteztxEjtBqxqixZwW7QgApRZrLIi1s0IGmVSV7xe_QQwi6NRZ6zAdrMdQQ8dX17bKJ1PV5Bs9W9DfuAdd_ipTUQ7R7wyrXQ2X6DncGH7I-adHP9OU6FF3azzWYdNNG7Plu52nY2nvDa6z7YEJ0Pj-jO6C7A07UP0ff7bD1dZMuv-cd0sswaLmXMDK1kTowmbS4qUhQCjJaEkFrXAqSUBSFC07ok0uSyEYYDSKhbQRg1JoF8iF4vdw_e_RwhRLVzR9-nl4pRXgqRlxVNKXJJNd6F4MGog7d77U-KEnXWqZJOddaprjoT8nJBLAD8xyvBBOWM_wKpbnBP</recordid><startdate>20181201</startdate><enddate>20181201</enddate><creator>Stockman, Arno</creator><creator>Masin, Fabrizio</creator><creator>Meneghini, Matteo</creator><creator>Zanoni, Enrico</creator><creator>Meneghesso, Gaudenzio</creator><creator>Bakeroot, Benoit</creator><creator>Moens, Peter</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-7349-9656</orcidid><orcidid>https://orcid.org/0000-0003-2421-505X</orcidid><orcidid>https://orcid.org/0000-0002-8992-4685</orcidid><orcidid>https://orcid.org/0000-0002-6947-1797</orcidid><orcidid>https://orcid.org/0000-0002-6715-4827</orcidid><orcidid>https://orcid.org/0000-0003-4392-1777</orcidid></search><sort><creationdate>20181201</creationdate><title>Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors</title><author>Stockman, Arno ; Masin, Fabrizio ; Meneghini, Matteo ; Zanoni, Enrico ; Meneghesso, Gaudenzio ; Bakeroot, Benoit ; Moens, Peter</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c399t-f18940fa0d4580665efa9000bab5e9996005a1b709f49c5f3ee9ebd5021ff40f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2018</creationdate><topic>Aluminum gallium nitride</topic><topic>Aluminum gallium nitrides</topic><topic>Bias</topic><topic>Conduction mechanism</topic><topic>Current measurement</topic><topic>Dislocations</topic><topic>Electric potential</topic><topic>enhancement mode</topic><topic>Gallium nitride</topic><topic>gallium nitride (GaN)</topic><topic>Gallium nitrides</topic><topic>High electron mobility transistors</topic><topic>high-electron-mobility transistor (HEMT)</topic><topic>Logic gates</topic><topic>p-GaN gate</topic><topic>Passivation</topic><topic>Schottky diodes</topic><topic>Semiconductor devices</topic><topic>Service life assessment</topic><topic>Temperature dependence</topic><topic>Thermionic emission</topic><topic>time-dependent breakdown (TDB)</topic><topic>Transistors</topic><topic>Wide band gap semiconductors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Stockman, Arno</creatorcontrib><creatorcontrib>Masin, Fabrizio</creatorcontrib><creatorcontrib>Meneghini, Matteo</creatorcontrib><creatorcontrib>Zanoni, Enrico</creatorcontrib><creatorcontrib>Meneghesso, Gaudenzio</creatorcontrib><creatorcontrib>Bakeroot, Benoit</creatorcontrib><creatorcontrib>Moens, Peter</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Stockman, Arno</au><au>Masin, Fabrizio</au><au>Meneghini, Matteo</au><au>Zanoni, Enrico</au><au>Meneghesso, Gaudenzio</au><au>Bakeroot, Benoit</au><au>Moens, Peter</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2018-12-01</date><risdate>2018</risdate><volume>65</volume><issue>12</issue><spage>5365</spage><epage>5372</epage><pages>5365-5372</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole-Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN "p-i-n" diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at <inline-formula> <tex-math notation="LaTeX">{t}_{\textsf {1}\%}=\textsf {10} </tex-math></inline-formula> years.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2018.2877262</doi><tpages>8</tpages><orcidid>https://orcid.org/0000-0001-7349-9656</orcidid><orcidid>https://orcid.org/0000-0003-2421-505X</orcidid><orcidid>https://orcid.org/0000-0002-8992-4685</orcidid><orcidid>https://orcid.org/0000-0002-6947-1797</orcidid><orcidid>https://orcid.org/0000-0002-6715-4827</orcidid><orcidid>https://orcid.org/0000-0003-4392-1777</orcidid><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | ISSN: 0018-9383 |
ispartof | IEEE transactions on electron devices, 2018-12, Vol.65 (12), p.5365-5372 |
issn | 0018-9383 1557-9646 |
language | eng |
recordid | cdi_crossref_primary_10_1109_TED_2018_2877262 |
source | IEEE Electronic Library (IEL) |
subjects | Aluminum gallium nitride Aluminum gallium nitrides Bias Conduction mechanism Current measurement Dislocations Electric potential enhancement mode Gallium nitride gallium nitride (GaN) Gallium nitrides High electron mobility transistors high-electron-mobility transistor (HEMT) Logic gates p-GaN gate Passivation Schottky diodes Semiconductor devices Service life assessment Temperature dependence Thermionic emission time-dependent breakdown (TDB) Transistors Wide band gap semiconductors |
title | Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T12%3A19%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Gate%20Conduction%20Mechanisms%20and%20Lifetime%20Modeling%20of%20p-Gate%20AlGaN/GaN%20High-Electron-Mobility%20Transistors&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Stockman,%20Arno&rft.date=2018-12-01&rft.volume=65&rft.issue=12&rft.spage=5365&rft.epage=5372&rft.pages=5365-5372&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2018.2877262&rft_dat=%3Cproquest_RIE%3E2137554781%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2137554781&rft_id=info:pmid/&rft_ieee_id=8525132&rfr_iscdi=true |