Characteristics of Coupling Capacitance Between Signal-Ground TSVs Considering MOS Effect in Silicon Interposers
Along with extensive applications of through-silicon vias (TSVs) in 3-D systems, such as digital, logic, and memory modules, the accurate modeling of coupling capacitance between the TSVs is becoming indispensable to the signal integrity analysis of the system design. In this paper, the static chara...
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| Veröffentlicht in: | IEEE transactions on electron devices 2015-12, Vol.62 (12), p.4161-4168 |
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| container_title | IEEE transactions on electron devices |
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| creator | Fang, Runiu Sun, Xin Miao, Min Jin, Yufeng |
| description | Along with extensive applications of through-silicon vias (TSVs) in 3-D systems, such as digital, logic, and memory modules, the accurate modeling of coupling capacitance between the TSVs is becoming indispensable to the signal integrity analysis of the system design. In this paper, the static characteristics of potential, electric field, and charges between signal-ground TSVs in a floating substrate are investigated, and accordingly, the effect of MOS capacitance on the coupling capacitance between signal and ground TSVs is accurately modeled and analyzed for both static and high-frequency situations. Furthermore, the impact of substrate admittance on the capacitance-voltage dependence is explored. Parametric studies are performed to study the effects of different physical and material parameters on the coupling capacitance, which include TSV radius, liner thickness, doping concentration, amount of oxide charges, and work function of TSV filling materials. Based on the proposed model, the nonlinear effect of the coupling capacitance on transient noise is examined and explained. |
| doi_str_mv | 10.1109/TED.2015.2494538 |
| format | Article |
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In this paper, the static characteristics of potential, electric field, and charges between signal-ground TSVs in a floating substrate are investigated, and accordingly, the effect of MOS capacitance on the coupling capacitance between signal and ground TSVs is accurately modeled and analyzed for both static and high-frequency situations. Furthermore, the impact of substrate admittance on the capacitance-voltage dependence is explored. Parametric studies are performed to study the effects of different physical and material parameters on the coupling capacitance, which include TSV radius, liner thickness, doping concentration, amount of oxide charges, and work function of TSV filling materials. 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In this paper, the static characteristics of potential, electric field, and charges between signal-ground TSVs in a floating substrate are investigated, and accordingly, the effect of MOS capacitance on the coupling capacitance between signal and ground TSVs is accurately modeled and analyzed for both static and high-frequency situations. Furthermore, the impact of substrate admittance on the capacitance-voltage dependence is explored. Parametric studies are performed to study the effects of different physical and material parameters on the coupling capacitance, which include TSV radius, liner thickness, doping concentration, amount of oxide charges, and work function of TSV filling materials. Based on the proposed model, the nonlinear effect of the coupling capacitance on transient noise is examined and explained.</description><subject>Capacitance</subject><subject>Coupling capacitance</subject><subject>Devices</subject><subject>Doping</subject><subject>Electric fields</subject><subject>Electric potential</subject><subject>Joining</subject><subject>Logic</subject><subject>Metal oxide semiconductors</subject><subject>MOS effect</subject><subject>Silicon</subject><subject>Substrates</subject><subject>Three dimensional</subject><subject>Through-silicon vias</subject><subject>through-silicon vias (TSVs)</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkc1r3DAQxUVoIdtN7oVcBL304o0-benYuNs0kLCH3eZqVHm0UXAkR7Ip_e8rs6GHzGUY-L03zDyEPlOyoZTo68P2-4YRKjdMaCG5OkMrKmVT6VrUH9CKEKoqzRU_R59yfi5jLQRbobF9MsnYCZLPk7cZR4fbOI-DD0fcmtFYP5lgAd_A9Acg4L0_BjNUtynOoceH_WMufMi-Lw5F8rDb461zYCfsF3jwNgZ8F8qCMWZI-QJ9dGbIcPnW1-jXj-2h_Vnd727v2m_3leVaTJVj0lhJtKZUmUa6WvR1rdlvcK4HI63joBXYHmwDkvXKCdtornVPqWlIT_kafT35jim-zpCn7sVnC8NgAsQ5d7RRdXkQY3VBv7xDn-OcypULxZUSUoiFIifKpphzAteNyb-Y9LejpFsi6EoE3RJB9xZBkVydJB4A_uMNZ6U0_wcV4oLm</recordid><startdate>20151201</startdate><enddate>20151201</enddate><creator>Fang, Runiu</creator><creator>Sun, Xin</creator><creator>Miao, Min</creator><creator>Jin, Yufeng</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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| subjects | Capacitance Coupling capacitance Devices Doping Electric fields Electric potential Joining Logic Metal oxide semiconductors MOS effect Silicon Substrates Three dimensional Through-silicon vias through-silicon vias (TSVs) |
| title | Characteristics of Coupling Capacitance Between Signal-Ground TSVs Considering MOS Effect in Silicon Interposers |
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