Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications
In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is ver...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on electron devices 2014-07, Vol.61 (7), p.2588-2594 |
|---|---|
| Hauptverfasser: | , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 2594 |
|---|---|
| container_issue | 7 |
| container_start_page | 2588 |
| container_title | IEEE transactions on electron devices |
| container_volume | 61 |
| creator | Zhixin Wang Ruei-Cheng Sun Liou, Juin J. Don-Gey Liu |
| description | In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is verified to provide bidirectional ESD protection performance superior to those reported in the literatures. Critical ESD parameters, such as the trigger voltage, holding voltage, and leakage current, can be flexibly adjusted via layout changes. With a low trigger voltage, a small ESD design window, a high robustness, and a small silicon area consumption, the PTBSCR is very suitable for low-voltage and low-power ESD protection applications. |
| doi_str_mv | 10.1109/TED.2014.2320827 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TED_2014_2320827</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6818402</ieee_id><sourcerecordid>1559722764</sourcerecordid><originalsourceid>FETCH-LOGICAL-c394t-181d2383ba44deb2ac2039518cebf9db64246c9c0aba1d3ac64aa66bd1aeea7f3</originalsourceid><addsrcrecordid>eNpdkE1LAzEQhoMoWKt3wcuCFy9b89Xs5ljb-gGViq29hmx2tqRsmzXZIvrrzdLiwdPMwPMOMw9C1wQPCMHyfjmdDCgmfEAZxTnNTlCPDIdZKgUXp6iHMclTyXJ2ji5C2MRRcE57aDVvWru1P1Amzet8kS69Xa_Bx_HBltaDaa3b6TpZjN-Tyvlk5r7SlatbvYZkupgkb961BygZNU1tje76cInOKl0HuDrWPvp4nC7Hz-ls_vQyHs1SwyRvU5KTksajCs15CQXVhmImhyQ3UFSyLASnXBhpsC40KZk2gmstRFESDaCzivXR3WFv493nHkKrtjYYqGu9A7cPKiqQGaWZ4BG9_Ydu3N7H3zqKC0wky3Ck8IEy3oXgoVKNt1vtvxXBqhOtomjViVZH0TFyc4hYAPjDRU5yjin7BcTxeTE</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1546019370</pqid></control><display><type>article</type><title>Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications</title><source>IEEE Electronic Library (IEL)</source><creator>Zhixin Wang ; Ruei-Cheng Sun ; Liou, Juin J. ; Don-Gey Liu</creator><creatorcontrib>Zhixin Wang ; Ruei-Cheng Sun ; Liou, Juin J. ; Don-Gey Liu</creatorcontrib><description>In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is verified to provide bidirectional ESD protection performance superior to those reported in the literatures. Critical ESD parameters, such as the trigger voltage, holding voltage, and leakage current, can be flexibly adjusted via layout changes. With a low trigger voltage, a small ESD design window, a high robustness, and a small silicon area consumption, the PTBSCR is very suitable for low-voltage and low-power ESD protection applications.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2014.2320827</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bidirectional ; Bidirectional protection ; CMOS ; Current measurement ; Electric potential ; electrostatic discharge (ESD) ; Electrostatic discharges ; Leakage current ; Leakage currents ; Logic gates ; pMOS-triggered ; Robustness ; Silicon ; silicon-controlled rectifier (SCR) ; Stress ; Thyristors ; trigger voltage ; Voltage</subject><ispartof>IEEE transactions on electron devices, 2014-07, Vol.61 (7), p.2588-2594</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Jul 2014</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c394t-181d2383ba44deb2ac2039518cebf9db64246c9c0aba1d3ac64aa66bd1aeea7f3</citedby><cites>FETCH-LOGICAL-c394t-181d2383ba44deb2ac2039518cebf9db64246c9c0aba1d3ac64aa66bd1aeea7f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6818402$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6818402$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zhixin Wang</creatorcontrib><creatorcontrib>Ruei-Cheng Sun</creatorcontrib><creatorcontrib>Liou, Juin J.</creatorcontrib><creatorcontrib>Don-Gey Liu</creatorcontrib><title>Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is verified to provide bidirectional ESD protection performance superior to those reported in the literatures. Critical ESD parameters, such as the trigger voltage, holding voltage, and leakage current, can be flexibly adjusted via layout changes. With a low trigger voltage, a small ESD design window, a high robustness, and a small silicon area consumption, the PTBSCR is very suitable for low-voltage and low-power ESD protection applications.</description><subject>Bidirectional</subject><subject>Bidirectional protection</subject><subject>CMOS</subject><subject>Current measurement</subject><subject>Electric potential</subject><subject>electrostatic discharge (ESD)</subject><subject>Electrostatic discharges</subject><subject>Leakage current</subject><subject>Leakage currents</subject><subject>Logic gates</subject><subject>pMOS-triggered</subject><subject>Robustness</subject><subject>Silicon</subject><subject>silicon-controlled rectifier (SCR)</subject><subject>Stress</subject><subject>Thyristors</subject><subject>trigger voltage</subject><subject>Voltage</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1LAzEQhoMoWKt3wcuCFy9b89Xs5ljb-gGViq29hmx2tqRsmzXZIvrrzdLiwdPMwPMOMw9C1wQPCMHyfjmdDCgmfEAZxTnNTlCPDIdZKgUXp6iHMclTyXJ2ji5C2MRRcE57aDVvWru1P1Amzet8kS69Xa_Bx_HBltaDaa3b6TpZjN-Tyvlk5r7SlatbvYZkupgkb961BygZNU1tje76cInOKl0HuDrWPvp4nC7Hz-ls_vQyHs1SwyRvU5KTksajCs15CQXVhmImhyQ3UFSyLASnXBhpsC40KZk2gmstRFESDaCzivXR3WFv493nHkKrtjYYqGu9A7cPKiqQGaWZ4BG9_Ydu3N7H3zqKC0wky3Ck8IEy3oXgoVKNt1vtvxXBqhOtomjViVZH0TFyc4hYAPjDRU5yjin7BcTxeTE</recordid><startdate>20140701</startdate><enddate>20140701</enddate><creator>Zhixin Wang</creator><creator>Ruei-Cheng Sun</creator><creator>Liou, Juin J.</creator><creator>Don-Gey Liu</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20140701</creationdate><title>Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications</title><author>Zhixin Wang ; Ruei-Cheng Sun ; Liou, Juin J. ; Don-Gey Liu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c394t-181d2383ba44deb2ac2039518cebf9db64246c9c0aba1d3ac64aa66bd1aeea7f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2014</creationdate><topic>Bidirectional</topic><topic>Bidirectional protection</topic><topic>CMOS</topic><topic>Current measurement</topic><topic>Electric potential</topic><topic>electrostatic discharge (ESD)</topic><topic>Electrostatic discharges</topic><topic>Leakage current</topic><topic>Leakage currents</topic><topic>Logic gates</topic><topic>pMOS-triggered</topic><topic>Robustness</topic><topic>Silicon</topic><topic>silicon-controlled rectifier (SCR)</topic><topic>Stress</topic><topic>Thyristors</topic><topic>trigger voltage</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zhixin Wang</creatorcontrib><creatorcontrib>Ruei-Cheng Sun</creatorcontrib><creatorcontrib>Liou, Juin J.</creatorcontrib><creatorcontrib>Don-Gey Liu</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhixin Wang</au><au>Ruei-Cheng Sun</au><au>Liou, Juin J.</au><au>Don-Gey Liu</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2014-07-01</date><risdate>2014</risdate><volume>61</volume><issue>7</issue><spage>2588</spage><epage>2594</epage><pages>2588-2594</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>In this paper, an optimized pMOS-triggered bidirectional silicon-controlled rectifier (PTBSCR) fabricated in a 0.18-μm CMOS technology is proposed as a viable electrostatic discharge (ESD) protection solution. Capable of working under both the power-ON and power-OFF conditions, this structure is verified to provide bidirectional ESD protection performance superior to those reported in the literatures. Critical ESD parameters, such as the trigger voltage, holding voltage, and leakage current, can be flexibly adjusted via layout changes. With a low trigger voltage, a small ESD design window, a high robustness, and a small silicon area consumption, the PTBSCR is very suitable for low-voltage and low-power ESD protection applications.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2014.2320827</doi><tpages>7</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9383 |
| ispartof | IEEE transactions on electron devices, 2014-07, Vol.61 (7), p.2588-2594 |
| issn | 0018-9383 1557-9646 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_TED_2014_2320827 |
| source | IEEE Electronic Library (IEL) |
| subjects | Bidirectional Bidirectional protection CMOS Current measurement Electric potential electrostatic discharge (ESD) Electrostatic discharges Leakage current Leakage currents Logic gates pMOS-triggered Robustness Silicon silicon-controlled rectifier (SCR) Stress Thyristors trigger voltage Voltage |
| title | Optimized pMOS-Triggered Bidirectional SCR for Low-Voltage ESD Protection Applications |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-13T17%3A59%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Optimized%20pMOS-Triggered%20Bidirectional%20SCR%20for%20Low-Voltage%20ESD%20Protection%20Applications&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Zhixin%20Wang&rft.date=2014-07-01&rft.volume=61&rft.issue=7&rft.spage=2588&rft.epage=2594&rft.pages=2588-2594&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2014.2320827&rft_dat=%3Cproquest_RIE%3E1559722764%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=1546019370&rft_id=info:pmid/&rft_ieee_id=6818402&rfr_iscdi=true |