Fabrication of \hbox\hbox/\hbox pMOSFETs Using Corrugated Substrates for Improved I and Reduced Layout-Width Dependence

Fabrication of \hbox\hbox/\hbox pMOSFETs Using Corrugated Substrates for Improved I and Reduced Layout-Width Dependence

Segmented-channel Si 1 - x Ge x /Si p-channel MOSFETs are fabricated using a conventional process, starting with corrugated Si 1 - x Ge x /Sisubstrates. As compared with the control devices fabricated using the same process but starting with a noncorrugated Si 1 - x Ge x /Si substrate, the segmented...

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Veröffentlicht in:IEEE transactions on electron devices 2013-01, Vol.60 (1), p.153-158
Hauptverfasser: Ho, B., Nuo Xu, Wood, B., Vinh Tran, Chopra, S., Yihwan Kim, Bich-Yen Nguyen, Bonnin, O., Mazure, C., Kuppurao, S., Chorng-Ping Chang, Tsu-Jae King Liu
Format: Artikel
Sprache:eng
Schlagworte:
CMOS
Fabrication
Layout
Logic gates
MOSFETs
Performance evaluation
Silicon
Silicon-germanium
Substrates
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Beschreibung
Zusammenfassung:Segmented-channel Si 1 - x Ge x /Si p-channel MOSFETs are fabricated using a conventional process, starting with corrugated Si 1 - x Ge x /Sisubstrates. As compared with the control devices fabricated using the same process but starting with a noncorrugated Si 1 - x Ge x /Si substrate, the segmented-channel MOSFETs show better layout efficiency (30% higher I ON for I OFF = 10 nA per micrometer layout width) due to enhanced hole mobility and dramatically reduced dependence of performance on layout width due to the geometrical regularity of the channel region.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2012.2230175