Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs
A surface-potential-based model is developed for the symmetric long-channel junctionless double-gate MOSFET. The relationships between surface potential and gate voltage are derived from some effective approximations to Poisson's equation for deep depletion, partial depletion, and accumulation...
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| Veröffentlicht in: | IEEE transactions on electron devices 2012-12, Vol.59 (12), p.3292-3298 |
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| container_end_page | 3298 |
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| container_issue | 12 |
| container_start_page | 3292 |
| container_title | IEEE transactions on electron devices |
| container_volume | 59 |
| creator | Chen, Zhuojun Xiao, Yongguang Tang, Minghua Xiong, Ying Huang, Jianqiang Li, Jiancheng Gu, Xiaochen Zhou, Yichun |
| description | A surface-potential-based model is developed for the symmetric long-channel junctionless double-gate MOSFET. The relationships between surface potential and gate voltage are derived from some effective approximations to Poisson's equation for deep depletion, partial depletion, and accumulation conditions. Then, the Pao-Sah integral is carried out to obtain the drain current. It is shown that the model is in good agreement with numerical simulations from subthreshold to saturation region. Finally, we discuss the strengths and limitations (i.e., threshold voltage shifts) of the JLFET, which has been recently proposed as a promising candidate for the JFET. |
| doi_str_mv | 10.1109/TED.2012.2221164 |
| format | Article |
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The relationships between surface potential and gate voltage are derived from some effective approximations to Poisson's equation for deep depletion, partial depletion, and accumulation conditions. Then, the Pao-Sah integral is carried out to obtain the drain current. It is shown that the model is in good agreement with numerical simulations from subthreshold to saturation region. Finally, we discuss the strengths and limitations (i.e., threshold voltage shifts) of the JLFET, which has been recently proposed as a promising candidate for the JFET.</description><subject>Applied sciences</subject><subject>Double gate (DG)</subject><subject>Electric potential</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Impurities</subject><subject>junctionless (JL) MOSFET</subject><subject>Logic gates</subject><subject>Numerical models</subject><subject>Numerical simulation</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon</subject><subject>surface potential</subject><subject>Threshold voltage</subject><subject>threshold voltage shift</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1PwzAQhi0EEqWwI7FkYXQ5f8SJR2hLAbUqUsuIItu5QFBwKjsZ-PekatXpdO-9zw0PIbcMJoyBftjOZxMOjE8454wpeUZGLE0zqpVU52QEwHKqRS4uyVWMP8OqpOQj8rnpQ2Uc0ve2Q9_VpqFPJmKZzIKpfTLtQxjiZNWW2CRVG5Jl67_o9Nt4PwRvvXdd3foGY0xmbW8bpAvTYbJab57n23hNLirTRLw5zjH5GOLpC12uF6_TxyV1ElRHpRXCIqYIXIMsS6FlZq0A7pxWlVUgUsFdrozKlLSWpQ6YgVzqSiNDQDEmcPjrQhtjwKrYhfrXhL-CQbHXUwx6ir2e4qhnQO4PyM5EZ5oqGO_qeOK4Uho0z4be3aFXI-LprITgUmvxDyzdbSk</recordid><startdate>20121201</startdate><enddate>20121201</enddate><creator>Chen, Zhuojun</creator><creator>Xiao, Yongguang</creator><creator>Tang, Minghua</creator><creator>Xiong, Ying</creator><creator>Huang, Jianqiang</creator><creator>Li, Jiancheng</creator><creator>Gu, Xiaochen</creator><creator>Zhou, Yichun</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20121201</creationdate><title>Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs</title><author>Chen, Zhuojun ; Xiao, Yongguang ; Tang, Minghua ; Xiong, Ying ; Huang, Jianqiang ; Li, Jiancheng ; Gu, Xiaochen ; Zhou, Yichun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c406t-4b33bee5e02904dd3947bb302cc96fb603532c86a6764bb15c01a0849f9e1e0e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Applied sciences</topic><topic>Double gate (DG)</topic><topic>Electric potential</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Impurities</topic><topic>junctionless (JL) MOSFET</topic><topic>Logic gates</topic><topic>Numerical models</topic><topic>Numerical simulation</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicon</topic><topic>surface potential</topic><topic>Threshold voltage</topic><topic>threshold voltage shift</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chen, Zhuojun</creatorcontrib><creatorcontrib>Xiao, Yongguang</creatorcontrib><creatorcontrib>Tang, Minghua</creatorcontrib><creatorcontrib>Xiong, Ying</creatorcontrib><creatorcontrib>Huang, Jianqiang</creatorcontrib><creatorcontrib>Li, Jiancheng</creatorcontrib><creatorcontrib>Gu, Xiaochen</creatorcontrib><creatorcontrib>Zhou, Yichun</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Zhuojun</au><au>Xiao, Yongguang</au><au>Tang, Minghua</au><au>Xiong, Ying</au><au>Huang, Jianqiang</au><au>Li, Jiancheng</au><au>Gu, Xiaochen</au><au>Zhou, Yichun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2012-12-01</date><risdate>2012</risdate><volume>59</volume><issue>12</issue><spage>3292</spage><epage>3298</epage><pages>3292-3298</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>A surface-potential-based model is developed for the symmetric long-channel junctionless double-gate MOSFET. The relationships between surface potential and gate voltage are derived from some effective approximations to Poisson's equation for deep depletion, partial depletion, and accumulation conditions. Then, the Pao-Sah integral is carried out to obtain the drain current. It is shown that the model is in good agreement with numerical simulations from subthreshold to saturation region. Finally, we discuss the strengths and limitations (i.e., threshold voltage shifts) of the JLFET, which has been recently proposed as a promising candidate for the JFET.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2012.2221164</doi><tpages>7</tpages></addata></record> |
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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Double gate (DG) Electric potential Electronics Exact sciences and technology Impurities junctionless (JL) MOSFET Logic gates Numerical models Numerical simulation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon surface potential Threshold voltage threshold voltage shift Transistors |
| title | Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs |
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