Analytical HFET I- V Model in Presence of Current Collapse
A compact analytical model of short-channel AlGaN/GaN HEMTs in the presence of a current collapse is presented. The model is based on an experimentally established trapping mechanism at the gate edges and relies on significant differences between the characteristic carrier capture-escape times and t...
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| Veröffentlicht in: | IEEE transactions on electron devices 2008-03, Vol.55 (3), p.712-720 |
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| container_title | IEEE transactions on electron devices |
| container_volume | 55 |
| creator | Koudymov, A. Shur, M.S. Simin, G. Kanin Chu Chao, P.C. Lee, C. Jimenez, J. Balistreri, A. |
| description | A compact analytical model of short-channel AlGaN/GaN HEMTs in the presence of a current collapse is presented. The model is based on an experimentally established trapping mechanism at the gate edges and relies on significant differences between the characteristic carrier capture-escape times and typical RF signal periods. For the first time, we implement the theory describing electric field distributions in the HEMT gate-to-drain spacing region, with and without trapped charge distributions. By consequently accounting for velocity saturation effects in gated and trapped regions of the device, the presented model shows good agreement with the experimental data. The model uses a minimal number of fitting parameters, most of which are physical parameters describing velocity-field dependence of the carriers. |
| doi_str_mv | 10.1109/TED.2007.915092 |
| format | Article |
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The model is based on an experimentally established trapping mechanism at the gate edges and relies on significant differences between the characteristic carrier capture-escape times and typical RF signal periods. For the first time, we implement the theory describing electric field distributions in the HEMT gate-to-drain spacing region, with and without trapped charge distributions. By consequently accounting for velocity saturation effects in gated and trapped regions of the device, the presented model shows good agreement with the experimental data. The model uses a minimal number of fitting parameters, most of which are physical parameters describing velocity-field dependence of the carriers.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2007.915092</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Analytical models ; Applied sciences ; Approximation methods ; Compact model ; current collapse ; Electronics ; Exact sciences and technology ; FETs ; Gallium nitride ; GaN ; HEMT ; HEMTs ; Logic gates ; MODFETs ; Semiconductor electronics. Microelectronics. Optoelectronics. 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The model is based on an experimentally established trapping mechanism at the gate edges and relies on significant differences between the characteristic carrier capture-escape times and typical RF signal periods. For the first time, we implement the theory describing electric field distributions in the HEMT gate-to-drain spacing region, with and without trapped charge distributions. By consequently accounting for velocity saturation effects in gated and trapped regions of the device, the presented model shows good agreement with the experimental data. The model uses a minimal number of fitting parameters, most of which are physical parameters describing velocity-field dependence of the carriers.</description><subject>Analytical models</subject><subject>Applied sciences</subject><subject>Approximation methods</subject><subject>Compact model</subject><subject>current collapse</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>FETs</subject><subject>Gallium nitride</subject><subject>GaN</subject><subject>HEMT</subject><subject>HEMTs</subject><subject>Logic gates</subject><subject>MODFETs</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kD1PwzAQhi0EEqEwM7B4YUzqi-M4ZqtCoZWKYCis0dU5S0Ehqewy9N_jKqi64XQf76t7jrF7EBmAMPPt8jnLhdCZASVMfsESUEqnpizKS5YIAVVqZCWv2U0I37EsiyJP2NNiwP546Cz2fPWy3PJ1yr_429hSz7uBf3gKNFjio-P1r_c0HHg99j3uA92yK4d9oLv_PGOf0aBepZv313W92KRWKn1IQRlrrGpVQbkrY0BbQqUdabVzO40tinivbA2QFDsEFJV1LWIeO1ZpKWdsPvlaP4bgyTV73_2gPzYgmhN6E9GbE3ozoUfF46TYY4hgzuNgu3CW5QKgMlrHvYdpryOi87go4t8qkH-WkmA4</recordid><startdate>20080301</startdate><enddate>20080301</enddate><creator>Koudymov, A.</creator><creator>Shur, M.S.</creator><creator>Simin, G.</creator><creator>Kanin Chu</creator><creator>Chao, P.C.</creator><creator>Lee, C.</creator><creator>Jimenez, J.</creator><creator>Balistreri, A.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20080301</creationdate><title>Analytical HFET I- V Model in Presence of Current Collapse</title><author>Koudymov, A. ; Shur, M.S. ; Simin, G. ; Kanin Chu ; Chao, P.C. ; Lee, C. ; Jimenez, J. ; Balistreri, A.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c357t-159c9c5d54e2f6f6f1d6187fe75bfb7ada05093d91e30ba1a08cfdaa2d91c5733</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2008</creationdate><topic>Analytical models</topic><topic>Applied sciences</topic><topic>Approximation methods</topic><topic>Compact model</topic><topic>current collapse</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>FETs</topic><topic>Gallium nitride</topic><topic>GaN</topic><topic>HEMT</topic><topic>HEMTs</topic><topic>Logic gates</topic><topic>MODFETs</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Koudymov, A.</creatorcontrib><creatorcontrib>Shur, M.S.</creatorcontrib><creatorcontrib>Simin, G.</creatorcontrib><creatorcontrib>Kanin Chu</creatorcontrib><creatorcontrib>Chao, P.C.</creatorcontrib><creatorcontrib>Lee, C.</creatorcontrib><creatorcontrib>Jimenez, J.</creatorcontrib><creatorcontrib>Balistreri, A.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Koudymov, A.</au><au>Shur, M.S.</au><au>Simin, G.</au><au>Kanin Chu</au><au>Chao, P.C.</au><au>Lee, C.</au><au>Jimenez, J.</au><au>Balistreri, A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Analytical HFET I- V Model in Presence of Current Collapse</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2008-03-01</date><risdate>2008</risdate><volume>55</volume><issue>3</issue><spage>712</spage><epage>720</epage><pages>712-720</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>A compact analytical model of short-channel AlGaN/GaN HEMTs in the presence of a current collapse is presented. The model is based on an experimentally established trapping mechanism at the gate edges and relies on significant differences between the characteristic carrier capture-escape times and typical RF signal periods. For the first time, we implement the theory describing electric field distributions in the HEMT gate-to-drain spacing region, with and without trapped charge distributions. By consequently accounting for velocity saturation effects in gated and trapped regions of the device, the presented model shows good agreement with the experimental data. The model uses a minimal number of fitting parameters, most of which are physical parameters describing velocity-field dependence of the carriers.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2007.915092</doi><tpages>9</tpages></addata></record> |
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| ispartof | IEEE transactions on electron devices, 2008-03, Vol.55 (3), p.712-720 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Analytical models Applied sciences Approximation methods Compact model current collapse Electronics Exact sciences and technology FETs Gallium nitride GaN HEMT HEMTs Logic gates MODFETs Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors |
| title | Analytical HFET I- V Model in Presence of Current Collapse |
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