A compact threshold voltage model for gate misalignment effect of DG FD SOI nMOS devices considering fringing electric field effects

A compact threshold voltage model for gate misalignment effect of DG FD SOI nMOS devices considering fringing electric field effects

This paper reports an analysis of gate misalignment effect on the threshold voltage of double-gate ultrathin fully depleted silicon-on-insulator nMOS devices using a compact model considering the fringing electric field effect, biased at zero-bias V/sub DS/. Using the conformal mapping transformatio...

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Veröffentlicht in:IEEE transactions on electron devices 2004-04, Vol.51 (4), p.587-596
Hauptverfasser: Kuo, J.B., Sun, E.C.
Format: Artikel
Sprache:eng
Schlagworte:
Devices
Electric breakdown
Electric fields
Gates
Mathematical analysis
Mathematical models
Misalignment
MOSFETs
Semiconductor device modeling
Silicon on insulator technology
Threshold voltage
Transformations
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Sun, E.C.
description This paper reports an analysis of gate misalignment effect on the threshold voltage of double-gate ultrathin fully depleted silicon-on-insulator nMOS devices using a compact model considering the fringing electric field effect, biased at zero-bias V/sub DS/. Using the conformal mapping transformation approach, a closed-form compact model considering the fringing electric field effect in the nongate overlap region has been derived to provide an accurate prediction of the threshold voltage behavior as verified by the two-dimensional simulation results.
doi_str_mv 10.1109/TED.2004.825108
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subjects Devices
Electric breakdown
Electric fields
Gates
Mathematical analysis
Mathematical models
Misalignment
MOSFETs
Semiconductor device modeling
Silicon on insulator technology
Threshold voltage
Transformations
title A compact threshold voltage model for gate misalignment effect of DG FD SOI nMOS devices considering fringing electric field effects
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