Novel FPGA Implementation of Hand Sign Recognition System With SOM-Hebb Classifier
This paper proposes a hardware posture recognition system with a hybrid network. The hybrid network consists of self-organizing map (SOM) and Hebbian network. Feature vectors are extracted from input posture images, which are mapped to a lower dimensional map of neurons in the SOM. The Hebbian netwo...
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Veröffentlicht in: | IEEE transactions on circuits and systems for video technology 2015-01, Vol.25 (1), p.153-166 |
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description | This paper proposes a hardware posture recognition system with a hybrid network. The hybrid network consists of self-organizing map (SOM) and Hebbian network. Feature vectors are extracted from input posture images, which are mapped to a lower dimensional map of neurons in the SOM. The Hebbian network is a single-layer feedforward neural network trained with a Hebbian learning algorithm to identify categories. The recognition algorithm is robust to the change in location of hand signs, but it is not immune to rotation or scaling. Its robustness to rotation and scaling was improved by adding perturbation to the training data for the SOM-Hebb classifier. In addition, neuron culling is proposed to improve performance. The whole system is implemented on a field-programmable gate array employing novel video processing architecture. The system was designed to recognize 24 American sign language hand signs, and its feasibility was verified through both simulations and experiments. The experimental results revealed that the system could accomplish recognition at a speed of 60 frames/s, while achieving an accuracy of 97.1%. Due to a novel hardware implementation, the circuit size of the proposed system is very small, which is highly suitable for embedded applications. |
doi_str_mv | 10.1109/TCSVT.2014.2335831 |
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The hybrid network consists of self-organizing map (SOM) and Hebbian network. Feature vectors are extracted from input posture images, which are mapped to a lower dimensional map of neurons in the SOM. The Hebbian network is a single-layer feedforward neural network trained with a Hebbian learning algorithm to identify categories. The recognition algorithm is robust to the change in location of hand signs, but it is not immune to rotation or scaling. Its robustness to rotation and scaling was improved by adding perturbation to the training data for the SOM-Hebb classifier. In addition, neuron culling is proposed to improve performance. The whole system is implemented on a field-programmable gate array employing novel video processing architecture. The system was designed to recognize 24 American sign language hand signs, and its feasibility was verified through both simulations and experiments. The experimental results revealed that the system could accomplish recognition at a speed of 60 frames/s, while achieving an accuracy of 97.1%. Due to a novel hardware implementation, the circuit size of the proposed system is very small, which is highly suitable for embedded applications.</description><identifier>ISSN: 1051-8215</identifier><identifier>EISSN: 1558-2205</identifier><identifier>DOI: 10.1109/TCSVT.2014.2335831</identifier><identifier>CODEN: ITCTEM</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Algorithms ; Circuits ; Classifiers ; Computer simulation ; Feature extraction ; Field programmable gate arrays ; Gesture recognition ; Hardware ; Histograms ; Networks ; Neural networks ; Neurons ; Recognition ; Sign language ; Signs ; Vectors</subject><ispartof>IEEE transactions on circuits and systems for video technology, 2015-01, Vol.25 (1), p.153-166</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Jan 2015</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c328t-aaf39d444be6b6f129e2e4689631c6510269a1d831c437880fb21ff294f23c533</citedby><cites>FETCH-LOGICAL-c328t-aaf39d444be6b6f129e2e4689631c6510269a1d831c437880fb21ff294f23c533</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6848809$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6848809$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Hikawa, Hiroomi</creatorcontrib><creatorcontrib>Kaida, Keishi</creatorcontrib><title>Novel FPGA Implementation of Hand Sign Recognition System With SOM-Hebb Classifier</title><title>IEEE transactions on circuits and systems for video technology</title><addtitle>TCSVT</addtitle><description>This paper proposes a hardware posture recognition system with a hybrid network. The hybrid network consists of self-organizing map (SOM) and Hebbian network. Feature vectors are extracted from input posture images, which are mapped to a lower dimensional map of neurons in the SOM. The Hebbian network is a single-layer feedforward neural network trained with a Hebbian learning algorithm to identify categories. The recognition algorithm is robust to the change in location of hand signs, but it is not immune to rotation or scaling. Its robustness to rotation and scaling was improved by adding perturbation to the training data for the SOM-Hebb classifier. In addition, neuron culling is proposed to improve performance. The whole system is implemented on a field-programmable gate array employing novel video processing architecture. The system was designed to recognize 24 American sign language hand signs, and its feasibility was verified through both simulations and experiments. The experimental results revealed that the system could accomplish recognition at a speed of 60 frames/s, while achieving an accuracy of 97.1%. Due to a novel hardware implementation, the circuit size of the proposed system is very small, which is highly suitable for embedded applications.</description><subject>Algorithms</subject><subject>Circuits</subject><subject>Classifiers</subject><subject>Computer simulation</subject><subject>Feature extraction</subject><subject>Field programmable gate arrays</subject><subject>Gesture recognition</subject><subject>Hardware</subject><subject>Histograms</subject><subject>Networks</subject><subject>Neural networks</subject><subject>Neurons</subject><subject>Recognition</subject><subject>Sign language</subject><subject>Signs</subject><subject>Vectors</subject><issn>1051-8215</issn><issn>1558-2205</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1Lw0AQhoMoWKt_QC8LXryk7nc2xxLsB1QrTdVj2KSzdUs-ajYV-u_dtuLB0wzM8w4zTxDcEjwgBMePyyR9Xw4oJnxAGROKkbOgR4RQIaVYnPseCxIqSsRlcOXcBntS8agXLF6abyjR6HU8RNNqW0IFdac729SoMWii6xVK7bpGCyiadW2Pg3TvOqjQh-0-UTp_DieQ5ygptXPWWGivgwujSwc3v7UfvI2elskknM3H02Q4CwtGVRdqbVi84pznIHNpCI2BApcqlowUUhBMZazJyr9ScBYphU1OiTE05oayQjDWDx5Oe7dt87UD12WVdQWUpa6h2bmMSBkrISPMPXr_D900u7b213mKcxx5U9hT9EQVbeNcCybbtrbS7T4jODtozo6as4Pm7FezD92dQhYA_gJScX9xzH4AeS52mA</recordid><startdate>201501</startdate><enddate>201501</enddate><creator>Hikawa, Hiroomi</creator><creator>Kaida, Keishi</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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The hybrid network consists of self-organizing map (SOM) and Hebbian network. Feature vectors are extracted from input posture images, which are mapped to a lower dimensional map of neurons in the SOM. The Hebbian network is a single-layer feedforward neural network trained with a Hebbian learning algorithm to identify categories. The recognition algorithm is robust to the change in location of hand signs, but it is not immune to rotation or scaling. Its robustness to rotation and scaling was improved by adding perturbation to the training data for the SOM-Hebb classifier. In addition, neuron culling is proposed to improve performance. The whole system is implemented on a field-programmable gate array employing novel video processing architecture. The system was designed to recognize 24 American sign language hand signs, and its feasibility was verified through both simulations and experiments. The experimental results revealed that the system could accomplish recognition at a speed of 60 frames/s, while achieving an accuracy of 97.1%. Due to a novel hardware implementation, the circuit size of the proposed system is very small, which is highly suitable for embedded applications.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSVT.2014.2335831</doi><tpages>14</tpages></addata></record> |
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subjects | Algorithms Circuits Classifiers Computer simulation Feature extraction Field programmable gate arrays Gesture recognition Hardware Histograms Networks Neural networks Neurons Recognition Sign language Signs Vectors |
title | Novel FPGA Implementation of Hand Sign Recognition System With SOM-Hebb Classifier |
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