Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference
This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-t...
Gespeichert in:
| Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2023-03, Vol.70 (3), p.1030-1042 |
|---|---|
| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 1042 |
|---|---|
| container_issue | 3 |
| container_start_page | 1030 |
| container_title | IEEE transactions on circuits and systems. I, Regular papers |
| container_volume | 70 |
| creator | Shetty, Darshan Steffan, Christoph Holweg, Gerald Bosch, Wolfgang Grosinger, Jasmin |
| description | This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips ( V_{\mathrm {REF}} and I_{\mathrm {REF}} ) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of V_{\mathrm {REF}} and I_{\mathrm {REF}} are 29ppm /^{\circ} \text{C} and 822ppm /^{\circ} \text{C} over a temperature range from - 40^{\circ} \text{C} to 120^{\circ} \text{C} . The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW. |
| doi_str_mv | 10.1109/TCSI.2022.3225574 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TCSI_2022_3225574</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9972849</ieee_id><sourcerecordid>2779668788</sourcerecordid><originalsourceid>FETCH-LOGICAL-c266t-a80a58c8198467134a486d779571b60fea6e69797e0b2960d93685d86de0d9693</originalsourceid><addsrcrecordid>eNpFkMtKw0AUhgdRsFYfQNwMuJ50ZpLMZSnBS6Gg9LZxMUyTE01pmziTWHwrn8Enc0KLrs4P5_vPgQ-ha0YjxqgezbPZOOKU8yjmPE1lcoIGLE0VoYqK0z4nmqiYq3N04f2aUq5pzAbodbFpnSWTek9e6j04POtWhOEl5ho3zXb0853hZb1p7RvgKZTgYJcDtrsCz96tg4JMwVe-rT4BZ50L2_Yfu0Rnpd14uDrOIVo83M-zJzJ5fhxndxOScyFaYhW1qcoV0yoRksWJTZQopNSpZCtBS7AChJZaAl1xLWihY6HSIjAQstDxEN0e7jau_ujAt2Zdd24XXhoezgihpFKBYgcqd7X3DkrTuGpr3Zdh1PQOTe_Q9A7N0WHo3Bw6FQD88VpLrhId_wKDMmtU</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2779668788</pqid></control><display><type>article</type><title>Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference</title><source>IEEE Electronic Library (IEL)</source><creator>Shetty, Darshan ; Steffan, Christoph ; Holweg, Gerald ; Bosch, Wolfgang ; Grosinger, Jasmin</creator><creatorcontrib>Shetty, Darshan ; Steffan, Christoph ; Holweg, Gerald ; Bosch, Wolfgang ; Grosinger, Jasmin</creatorcontrib><description><![CDATA[This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (<inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula>) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of <inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula> are 29ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> and 822ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> over a temperature range from <inline-formula> <tex-math notation="LaTeX">- 40^{\circ} \text{C} </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">120^{\circ} \text{C} </tex-math></inline-formula>. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.]]></description><identifier>ISSN: 1549-8328</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2022.3225574</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bipolar transistors ; Chip formation ; current reference ; curvature compensation ; Electric potential ; high-precision ; Manganese ; Power consumption ; Resistors ; Room temperature ; sub-1V ; sub-threshold CMOS design ; temperature compensation ; Temperature dependence ; Temperature measurement ; Threshold voltage ; Transistors ; ultra-low-power ; Voltage ; Voltage reference ; voltage-current reference</subject><ispartof>IEEE transactions on circuits and systems. I, Regular papers, 2023-03, Vol.70 (3), p.1030-1042</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2023</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c266t-a80a58c8198467134a486d779571b60fea6e69797e0b2960d93685d86de0d9693</citedby><cites>FETCH-LOGICAL-c266t-a80a58c8198467134a486d779571b60fea6e69797e0b2960d93685d86de0d9693</cites><orcidid>0000-0003-1639-5919 ; 0000-0002-9312-6811 ; 0000-0001-5096-1465 ; 0000-0002-9594-878X</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9972849$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids></links><search><creatorcontrib>Shetty, Darshan</creatorcontrib><creatorcontrib>Steffan, Christoph</creatorcontrib><creatorcontrib>Holweg, Gerald</creatorcontrib><creatorcontrib>Bosch, Wolfgang</creatorcontrib><creatorcontrib>Grosinger, Jasmin</creatorcontrib><title>Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference</title><title>IEEE transactions on circuits and systems. I, Regular papers</title><addtitle>TCSI</addtitle><description><![CDATA[This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (<inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula>) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of <inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula> are 29ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> and 822ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> over a temperature range from <inline-formula> <tex-math notation="LaTeX">- 40^{\circ} \text{C} </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">120^{\circ} \text{C} </tex-math></inline-formula>. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.]]></description><subject>Bipolar transistors</subject><subject>Chip formation</subject><subject>current reference</subject><subject>curvature compensation</subject><subject>Electric potential</subject><subject>high-precision</subject><subject>Manganese</subject><subject>Power consumption</subject><subject>Resistors</subject><subject>Room temperature</subject><subject>sub-1V</subject><subject>sub-threshold CMOS design</subject><subject>temperature compensation</subject><subject>Temperature dependence</subject><subject>Temperature measurement</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>ultra-low-power</subject><subject>Voltage</subject><subject>Voltage reference</subject><subject>voltage-current reference</subject><issn>1549-8328</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><recordid>eNpFkMtKw0AUhgdRsFYfQNwMuJ50ZpLMZSnBS6Gg9LZxMUyTE01pmziTWHwrn8Enc0KLrs4P5_vPgQ-ha0YjxqgezbPZOOKU8yjmPE1lcoIGLE0VoYqK0z4nmqiYq3N04f2aUq5pzAbodbFpnSWTek9e6j04POtWhOEl5ho3zXb0853hZb1p7RvgKZTgYJcDtrsCz96tg4JMwVe-rT4BZ50L2_Yfu0Rnpd14uDrOIVo83M-zJzJ5fhxndxOScyFaYhW1qcoV0yoRksWJTZQopNSpZCtBS7AChJZaAl1xLWihY6HSIjAQstDxEN0e7jau_ujAt2Zdd24XXhoezgihpFKBYgcqd7X3DkrTuGpr3Zdh1PQOTe_Q9A7N0WHo3Bw6FQD88VpLrhId_wKDMmtU</recordid><startdate>20230301</startdate><enddate>20230301</enddate><creator>Shetty, Darshan</creator><creator>Steffan, Christoph</creator><creator>Holweg, Gerald</creator><creator>Bosch, Wolfgang</creator><creator>Grosinger, Jasmin</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0003-1639-5919</orcidid><orcidid>https://orcid.org/0000-0002-9312-6811</orcidid><orcidid>https://orcid.org/0000-0001-5096-1465</orcidid><orcidid>https://orcid.org/0000-0002-9594-878X</orcidid></search><sort><creationdate>20230301</creationdate><title>Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference</title><author>Shetty, Darshan ; Steffan, Christoph ; Holweg, Gerald ; Bosch, Wolfgang ; Grosinger, Jasmin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c266t-a80a58c8198467134a486d779571b60fea6e69797e0b2960d93685d86de0d9693</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Bipolar transistors</topic><topic>Chip formation</topic><topic>current reference</topic><topic>curvature compensation</topic><topic>Electric potential</topic><topic>high-precision</topic><topic>Manganese</topic><topic>Power consumption</topic><topic>Resistors</topic><topic>Room temperature</topic><topic>sub-1V</topic><topic>sub-threshold CMOS design</topic><topic>temperature compensation</topic><topic>Temperature dependence</topic><topic>Temperature measurement</topic><topic>Threshold voltage</topic><topic>Transistors</topic><topic>ultra-low-power</topic><topic>Voltage</topic><topic>Voltage reference</topic><topic>voltage-current reference</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Shetty, Darshan</creatorcontrib><creatorcontrib>Steffan, Christoph</creatorcontrib><creatorcontrib>Holweg, Gerald</creatorcontrib><creatorcontrib>Bosch, Wolfgang</creatorcontrib><creatorcontrib>Grosinger, Jasmin</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Shetty, Darshan</au><au>Steffan, Christoph</au><au>Holweg, Gerald</au><au>Bosch, Wolfgang</au><au>Grosinger, Jasmin</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference</atitle><jtitle>IEEE transactions on circuits and systems. I, Regular papers</jtitle><stitle>TCSI</stitle><date>2023-03-01</date><risdate>2023</risdate><volume>70</volume><issue>3</issue><spage>1030</spage><epage>1042</epage><pages>1030-1042</pages><issn>1549-8328</issn><eissn>1558-0806</eissn><coden>ITCSCH</coden><abstract><![CDATA[This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips (<inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula>) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of <inline-formula> <tex-math notation="LaTeX">V_{\mathrm {REF}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">I_{\mathrm {REF}} </tex-math></inline-formula> are 29ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> and 822ppm<inline-formula> <tex-math notation="LaTeX">/^{\circ} \text{C} </tex-math></inline-formula> over a temperature range from <inline-formula> <tex-math notation="LaTeX">- 40^{\circ} \text{C} </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">120^{\circ} \text{C} </tex-math></inline-formula>. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSI.2022.3225574</doi><tpages>13</tpages><orcidid>https://orcid.org/0000-0003-1639-5919</orcidid><orcidid>https://orcid.org/0000-0002-9312-6811</orcidid><orcidid>https://orcid.org/0000-0001-5096-1465</orcidid><orcidid>https://orcid.org/0000-0002-9594-878X</orcidid><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 1549-8328 |
| ispartof | IEEE transactions on circuits and systems. I, Regular papers, 2023-03, Vol.70 (3), p.1030-1042 |
| issn | 1549-8328 1558-0806 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_TCSI_2022_3225574 |
| source | IEEE Electronic Library (IEL) |
| subjects | Bipolar transistors Chip formation current reference curvature compensation Electric potential high-precision Manganese Power consumption Resistors Room temperature sub-1V sub-threshold CMOS design temperature compensation Temperature dependence Temperature measurement Threshold voltage Transistors ultra-low-power Voltage Voltage reference voltage-current reference |
| title | Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T21%3A42%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Ultra-Low-Power%20Sub-1%20V%2029%20ppm/%C2%B0C%20Voltage%20Reference%20and%20Shared-Resistive%20Current%20Reference&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems.%20I,%20Regular%20papers&rft.au=Shetty,%20Darshan&rft.date=2023-03-01&rft.volume=70&rft.issue=3&rft.spage=1030&rft.epage=1042&rft.pages=1030-1042&rft.issn=1549-8328&rft.eissn=1558-0806&rft.coden=ITCSCH&rft_id=info:doi/10.1109/TCSI.2022.3225574&rft_dat=%3Cproquest_cross%3E2779668788%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2779668788&rft_id=info:pmid/&rft_ieee_id=9972849&rfr_iscdi=true |