Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications

In this paper, the designs of both non-iterative and iterative approximate logarithmic multipliers (ALMs) are studied to further reduce power consumption and improve performance. Non-iterative ALMs, that use three inexact mantissa adders, are presented. The proposed iterative ALMs (IALMs) use a set-...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-09, Vol.65 (9), p.2856-2868
Hauptverfasser: Weiqiang Liu, Jiahua Xu, Danye Wang, Chenghua Wang, Montuschi, Paolo, Lombardi, Fabrizio
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!