A 310 nW Temperature Sensor Achieving 9.8 mK Resolution Using a DFLL-Based Readout Circuit
This brief reports a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags. The system utilizes a mostly digital approach to achieve energy-efficient, sub- \mu \text{W} operation with a resistor-based temperature sensor. A sampled, incomplete-settling, switched-...
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| Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2022-03, Vol.69 (3), p.704-708 |
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| container_title | IEEE transactions on circuits and systems. II, Express briefs |
| container_volume | 69 |
| creator | Jain, Aditi Jiang, Haowei Pochet, Corentin Hall, Drew A. |
| description | This brief reports a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags. The system utilizes a mostly digital approach to achieve energy-efficient, sub- \mu \text{W} operation with a resistor-based temperature sensor. A sampled, incomplete-settling, switched-capacitor-based Wheatstone bridge is read out using a digital frequency-locked loop (DFLL) while harnessing the quasi-periodic limit cycles to reduce in-band noise. Implemented in a 65 nm CMOS process, it consumes 310 nW and achieves 9.8 mK resolution in a 10 ms conversion time. This results in a 297 fJ {\mathrm {\cdot }}\text{K}~^{2} figure-of-merit (FoM) and low energy (3.1 nJ/meas.). |
| doi_str_mv | 10.1109/TCSII.2021.3106265 |
| format | Article |
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II, Express briefs</title><addtitle>TCSII</addtitle><description><![CDATA[This brief reports a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags. The system utilizes a mostly digital approach to achieve energy-efficient, sub-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula> operation with a resistor-based temperature sensor. A sampled, incomplete-settling, switched-capacitor-based Wheatstone bridge is read out using a digital frequency-locked loop (DFLL) while harnessing the quasi-periodic limit cycles to reduce in-band noise. Implemented in a 65 nm CMOS process, it consumes 310 nW and achieves 9.8 mK resolution in a 10 ms conversion time. This results in a 297 fJ <inline-formula> <tex-math notation="LaTeX">{\mathrm {\cdot }}\text{K}~^{2} </tex-math></inline-formula> figure-of-merit (FoM) and low energy (3.1 nJ/meas.).]]></description><subject>Circuits</subject><subject>Clocks</subject><subject>digital</subject><subject>Frequency locked loops</subject><subject>Frequency locking</subject><subject>frequency-locked loop (FLL)</subject><subject>Limit-cycles</subject><subject>Power harmonic filters</subject><subject>Resistance-to-digital converter (RDC)</subject><subject>Sensors</subject><subject>Switches</subject><subject>Temperature sensors</subject><subject>Wheatstone bridges</subject><issn>1549-7747</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kE9Lw0AQxRdRsFa_gF4WPCfunyS7e6yx1WJAsC2Cl2W7mdWUNqm7ieC3N7HF0zxm3pthfghdUxJTStTdMl_M5zEjjMackoxl6Qka0TSVEReKng46UZEQiThHFyFsCGGKcDZC7xPcB3D9hpew24M3becBL6AOjccT-1nBd1V_YBVLvHvGrxCabddWTY1XYegb_DAriujeBCj7qSmbrsV55W1XtZfozJltgKtjHaPVbLrMn6Li5XGeT4rI8oy2USmtWlsrhUozAwJSy01iXALcrUkJiXMEKFsnpQJXMmms69-yhPSapsIJPka3h71733x1EFq9aTpf9yc1y7hSnJNM9i52cFnfhODB6b2vdsb_aEr0wFD_MdQDQ31k2IduDqEKAP4DKqUqY5L_Aqf3bDA</recordid><startdate>20220301</startdate><enddate>20220301</enddate><creator>Jain, Aditi</creator><creator>Jiang, Haowei</creator><creator>Pochet, Corentin</creator><creator>Hall, Drew A.</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jain, Aditi</au><au>Jiang, Haowei</au><au>Pochet, Corentin</au><au>Hall, Drew A.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 310 nW Temperature Sensor Achieving 9.8 mK Resolution Using a DFLL-Based Readout Circuit</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2022-03-01</date><risdate>2022</risdate><volume>69</volume><issue>3</issue><spage>704</spage><epage>708</epage><pages>704-708</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ITCSFK</coden><abstract><![CDATA[This brief reports a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags. The system utilizes a mostly digital approach to achieve energy-efficient, sub-<inline-formula> <tex-math notation="LaTeX">\mu \text{W} </tex-math></inline-formula> operation with a resistor-based temperature sensor. A sampled, incomplete-settling, switched-capacitor-based Wheatstone bridge is read out using a digital frequency-locked loop (DFLL) while harnessing the quasi-periodic limit cycles to reduce in-band noise. Implemented in a 65 nm CMOS process, it consumes 310 nW and achieves 9.8 mK resolution in a 10 ms conversion time. This results in a 297 fJ <inline-formula> <tex-math notation="LaTeX">{\mathrm {\cdot }}\text{K}~^{2} </tex-math></inline-formula> figure-of-merit (FoM) and low energy (3.1 nJ/meas.).]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSII.2021.3106265</doi><tpages>5</tpages><orcidid>https://orcid.org/0000-0003-0674-074X</orcidid><orcidid>https://orcid.org/0000-0002-3826-340X</orcidid><orcidid>https://orcid.org/0000-0002-7120-0507</orcidid><orcidid>https://orcid.org/0000-0002-2539-3547</orcidid></addata></record> |
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| ispartof | IEEE transactions on circuits and systems. II, Express briefs, 2022-03, Vol.69 (3), p.704-708 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Circuits Clocks digital Frequency locked loops Frequency locking frequency-locked loop (FLL) Limit-cycles Power harmonic filters Resistance-to-digital converter (RDC) Sensors Switches Temperature sensors Wheatstone bridges |
| title | A 310 nW Temperature Sensor Achieving 9.8 mK Resolution Using a DFLL-Based Readout Circuit |
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