A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching

In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the co...

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Veröffentlicht in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2011-03, Vol.58 (3), p.169-173
Hauptverfasser: Kim, Manho, Lee, Hyunjoong, Woo, Jong-Kwan, Xing, Nan, Kim, Min-Oh, Kim, Suhwan
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container_end_page 173
container_issue 3
container_start_page 169
container_title IEEE transactions on circuits and systems. II, Express briefs
container_volume 58
creator Kim, Manho
Lee, Hyunjoong
Woo, Jong-Kwan
Xing, Nan
Kim, Min-Oh
Kim, Suhwan
description In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the corresponding power consumption, as compared with the prior arts with two parallel time interpolators. A prototype was designed and fabricated in a 0.35- μm CMOS digital process, and its core area merely occupies 0.126 mm 2 . Measurements show that our TDC achieves a resolution of 357 ps while consuming 1.22 mW with a 2.5-V supply. The dynamic range of the TDC exceeds 1.46 μs. The measurement rate can achieve above 400 kS/s.
doi_str_mv 10.1109/TCSII.2011.2106353
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source IEEE/IET Electronic Library (IEL)
subjects Capacitors
Circuits
Clocks
CMOS
CMOS integrated circuits
Conversion
Converters
Current measurement
Dual-slope conversion
Dynamic range
interpolator
Power consumption
Radiation detectors
Retarding
Stretching
time stretcher
time-to-digital converter (TDC)
title A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching
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