A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching
In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the co...
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Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2011-03, Vol.58 (3), p.169-173 |
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creator | Kim, Manho Lee, Hyunjoong Woo, Jong-Kwan Xing, Nan Kim, Min-Oh Kim, Suhwan |
description | In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the corresponding power consumption, as compared with the prior arts with two parallel time interpolators. A prototype was designed and fabricated in a 0.35- μm CMOS digital process, and its core area merely occupies 0.126 mm 2 . Measurements show that our TDC achieves a resolution of 357 ps while consuming 1.22 mW with a 2.5-V supply. The dynamic range of the TDC exceeds 1.46 μs. The measurement rate can achieve above 400 kS/s. |
doi_str_mv | 10.1109/TCSII.2011.2106353 |
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fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TCSII_2011_2106353</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5720285</ieee_id><sourcerecordid>2553126781</sourcerecordid><originalsourceid>FETCH-LOGICAL-c392t-45745f08c70da7e4aefbaeff2b038f05d15d423a3e098b3f72baa0837e3cd9793</originalsourceid><addsrcrecordid>eNpdkMtOwzAQRS0EEqXwA7CJ2LBy8SOO7WUVXpUqgdR0bTnJpKRK42KnVPw9aVqxYDGaGd1zR6OL0C0lE0qJfszSxWw2YYTSCaMk4YKfoREVQmEuNT0_zLHGUsbyEl2FsCaEacLZCC2n0dztcepCF9m2HJYPtwcfZfUGcOfwU72qO9tEqWu_wXe9sgx1u4oyX28bwIvGbWGAo0XnoSs-e_EaXVS2CXBz6mO0fHnO0jc8f3-dpdM5LrhmHY6FjEVFVCFJaSXEFqq8r4rlhKuKiJKKMmbcciBa5bySLLeWKC6BF6WWmo_Rw_Hu1ruvHYTObOpQQNPYFtwuGJVoRXjCaE_e_yPXbufb_jmjKU80VwPEjlDhXQgeKrP19cb6H0OJOeRshpzNIWdzyrk33R1NNQD8GYRkhCnBfwFGaHiS</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>913693821</pqid></control><display><type>article</type><title>A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching</title><source>IEEE/IET Electronic Library (IEL)</source><creator>Kim, Manho ; Lee, Hyunjoong ; Woo, Jong-Kwan ; Xing, Nan ; Kim, Min-Oh ; Kim, Suhwan</creator><creatorcontrib>Kim, Manho ; Lee, Hyunjoong ; Woo, Jong-Kwan ; Xing, Nan ; Kim, Min-Oh ; Kim, Suhwan</creatorcontrib><description>In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the corresponding power consumption, as compared with the prior arts with two parallel time interpolators. A prototype was designed and fabricated in a 0.35- μm CMOS digital process, and its core area merely occupies 0.126 mm 2 . Measurements show that our TDC achieves a resolution of 357 ps while consuming 1.22 mW with a 2.5-V supply. The dynamic range of the TDC exceeds 1.46 μs. The measurement rate can achieve above 400 kS/s.</description><identifier>ISSN: 1549-7747</identifier><identifier>EISSN: 1558-3791</identifier><identifier>DOI: 10.1109/TCSII.2011.2106353</identifier><identifier>CODEN: ICSPE5</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Capacitors ; Circuits ; Clocks ; CMOS ; CMOS integrated circuits ; Conversion ; Converters ; Current measurement ; Dual-slope conversion ; Dynamic range ; interpolator ; Power consumption ; Radiation detectors ; Retarding ; Stretching ; time stretcher ; time-to-digital converter (TDC)</subject><ispartof>IEEE transactions on circuits and systems. II, Express briefs, 2011-03, Vol.58 (3), p.169-173</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2011</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c392t-45745f08c70da7e4aefbaeff2b038f05d15d423a3e098b3f72baa0837e3cd9793</citedby><cites>FETCH-LOGICAL-c392t-45745f08c70da7e4aefbaeff2b038f05d15d423a3e098b3f72baa0837e3cd9793</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5720285$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5720285$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Kim, Manho</creatorcontrib><creatorcontrib>Lee, Hyunjoong</creatorcontrib><creatorcontrib>Woo, Jong-Kwan</creatorcontrib><creatorcontrib>Xing, Nan</creatorcontrib><creatorcontrib>Kim, Min-Oh</creatorcontrib><creatorcontrib>Kim, Suhwan</creatorcontrib><title>A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching</title><title>IEEE transactions on circuits and systems. II, Express briefs</title><addtitle>TCSII</addtitle><description>In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the corresponding power consumption, as compared with the prior arts with two parallel time interpolators. A prototype was designed and fabricated in a 0.35- μm CMOS digital process, and its core area merely occupies 0.126 mm 2 . Measurements show that our TDC achieves a resolution of 357 ps while consuming 1.22 mW with a 2.5-V supply. The dynamic range of the TDC exceeds 1.46 μs. The measurement rate can achieve above 400 kS/s.</description><subject>Capacitors</subject><subject>Circuits</subject><subject>Clocks</subject><subject>CMOS</subject><subject>CMOS integrated circuits</subject><subject>Conversion</subject><subject>Converters</subject><subject>Current measurement</subject><subject>Dual-slope conversion</subject><subject>Dynamic range</subject><subject>interpolator</subject><subject>Power consumption</subject><subject>Radiation detectors</subject><subject>Retarding</subject><subject>Stretching</subject><subject>time stretcher</subject><subject>time-to-digital converter (TDC)</subject><issn>1549-7747</issn><issn>1558-3791</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkMtOwzAQRS0EEqXwA7CJ2LBy8SOO7WUVXpUqgdR0bTnJpKRK42KnVPw9aVqxYDGaGd1zR6OL0C0lE0qJfszSxWw2YYTSCaMk4YKfoREVQmEuNT0_zLHGUsbyEl2FsCaEacLZCC2n0dztcepCF9m2HJYPtwcfZfUGcOfwU72qO9tEqWu_wXe9sgx1u4oyX28bwIvGbWGAo0XnoSs-e_EaXVS2CXBz6mO0fHnO0jc8f3-dpdM5LrhmHY6FjEVFVCFJaSXEFqq8r4rlhKuKiJKKMmbcciBa5bySLLeWKC6BF6WWmo_Rw_Hu1ruvHYTObOpQQNPYFtwuGJVoRXjCaE_e_yPXbufb_jmjKU80VwPEjlDhXQgeKrP19cb6H0OJOeRshpzNIWdzyrk33R1NNQD8GYRkhCnBfwFGaHiS</recordid><startdate>201103</startdate><enddate>201103</enddate><creator>Kim, Manho</creator><creator>Lee, Hyunjoong</creator><creator>Woo, Jong-Kwan</creator><creator>Xing, Nan</creator><creator>Kim, Min-Oh</creator><creator>Kim, Suhwan</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>201103</creationdate><title>A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching</title><author>Kim, Manho ; Lee, Hyunjoong ; Woo, Jong-Kwan ; Xing, Nan ; Kim, Min-Oh ; Kim, Suhwan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c392t-45745f08c70da7e4aefbaeff2b038f05d15d423a3e098b3f72baa0837e3cd9793</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Capacitors</topic><topic>Circuits</topic><topic>Clocks</topic><topic>CMOS</topic><topic>CMOS integrated circuits</topic><topic>Conversion</topic><topic>Converters</topic><topic>Current measurement</topic><topic>Dual-slope conversion</topic><topic>Dynamic range</topic><topic>interpolator</topic><topic>Power consumption</topic><topic>Radiation detectors</topic><topic>Retarding</topic><topic>Stretching</topic><topic>time stretcher</topic><topic>time-to-digital converter (TDC)</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kim, Manho</creatorcontrib><creatorcontrib>Lee, Hyunjoong</creatorcontrib><creatorcontrib>Woo, Jong-Kwan</creatorcontrib><creatorcontrib>Xing, Nan</creatorcontrib><creatorcontrib>Kim, Min-Oh</creatorcontrib><creatorcontrib>Kim, Suhwan</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kim, Manho</au><au>Lee, Hyunjoong</au><au>Woo, Jong-Kwan</au><au>Xing, Nan</au><au>Kim, Min-Oh</au><au>Kim, Suhwan</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching</atitle><jtitle>IEEE transactions on circuits and systems. II, Express briefs</jtitle><stitle>TCSII</stitle><date>2011-03</date><risdate>2011</risdate><volume>58</volume><issue>3</issue><spage>169</spage><epage>173</epage><pages>169-173</pages><issn>1549-7747</issn><eissn>1558-3791</eissn><coden>ICSPE5</coden><abstract>In this brief, we present a time-to-digital converter (TDC) in which a single interpolator is used to improve the resolution by time stretching. The interpolator is based on a triple-slope conversion. Without slowing down the measured event, this approach extensively reduces the chip area and the corresponding power consumption, as compared with the prior arts with two parallel time interpolators. A prototype was designed and fabricated in a 0.35- μm CMOS digital process, and its core area merely occupies 0.126 mm 2 . Measurements show that our TDC achieves a resolution of 357 ps while consuming 1.22 mW with a 2.5-V supply. The dynamic range of the TDC exceeds 1.46 μs. The measurement rate can achieve above 400 kS/s.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TCSII.2011.2106353</doi><tpages>5</tpages></addata></record> |
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subjects | Capacitors Circuits Clocks CMOS CMOS integrated circuits Conversion Converters Current measurement Dual-slope conversion Dynamic range interpolator Power consumption Radiation detectors Retarding Stretching time stretcher time-to-digital converter (TDC) |
title | A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-07T17%3A32%3A23IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Low-Cost%20and%20Low-Power%20Time-to-Digital%20Converter%20Using%20Triple-Slope%20Time%20Stretching&rft.jtitle=IEEE%20transactions%20on%20circuits%20and%20systems.%20II,%20Express%20briefs&rft.au=Kim,%20Manho&rft.date=2011-03&rft.volume=58&rft.issue=3&rft.spage=169&rft.epage=173&rft.pages=169-173&rft.issn=1549-7747&rft.eissn=1558-3791&rft.coden=ICSPE5&rft_id=info:doi/10.1109/TCSII.2011.2106353&rft_dat=%3Cproquest_RIE%3E2553126781%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=913693821&rft_id=info:pmid/&rft_ieee_id=5720285&rfr_iscdi=true |