3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections
In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhan...
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| Veröffentlicht in: | IEEE transactions on components, packaging, and manufacturing technology (2011) packaging, and manufacturing technology (2011), 2013-02, Vol.3 (2), p.221-228 |
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| container_title | IEEE transactions on components, packaging, and manufacturing technology (2011) |
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| creator | Khan, N. Li Hong Yu Tan Siow Pin Soon Wee Ho Kripesh, V. Pinjala, D. Lau, J. H. Toh Kok Chuan |
| description | In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated liquid cooling solution for 100 W from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed. |
| doi_str_mv | 10.1109/TCPMT.2012.2186297 |
| format | Article |
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The fluidic interconnections and sealing techniques have been discussed.</description><identifier>ISSN: 2156-3950</identifier><identifier>EISSN: 2156-3985</identifier><identifier>DOI: 10.1109/TCPMT.2012.2186297</identifier><identifier>CODEN: ITCPC8</identifier><language>eng</language><publisher>IEEE</publisher><subject>3-D packaging ; Heat transfer ; Heating ; Liquid cooling ; micro-channel cooling ; Thermal resistance ; Through-silicon vias</subject><ispartof>IEEE transactions on components, packaging, and manufacturing technology (2011), 2013-02, Vol.3 (2), p.221-228</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c267t-5e2195909ee9ee2a371cf3c8a54008a1e19cfa2c316d23daef0496602310cde23</citedby><cites>FETCH-LOGICAL-c267t-5e2195909ee9ee2a371cf3c8a54008a1e19cfa2c316d23daef0496602310cde23</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6410399$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,778,782,794,27911,27912,54745</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6410399$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Khan, N.</creatorcontrib><creatorcontrib>Li Hong Yu</creatorcontrib><creatorcontrib>Tan Siow Pin</creatorcontrib><creatorcontrib>Soon Wee Ho</creatorcontrib><creatorcontrib>Kripesh, V.</creatorcontrib><creatorcontrib>Pinjala, D.</creatorcontrib><creatorcontrib>Lau, J. H.</creatorcontrib><creatorcontrib>Toh Kok Chuan</creatorcontrib><title>3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections</title><title>IEEE transactions on components, packaging, and manufacturing technology (2011)</title><addtitle>TCPMT</addtitle><description>In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated liquid cooling solution for 100 W from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed.</description><subject>3-D packaging</subject><subject>Heat transfer</subject><subject>Heating</subject><subject>Liquid cooling</subject><subject>micro-channel cooling</subject><subject>Thermal resistance</subject><subject>Through-silicon vias</subject><issn>2156-3950</issn><issn>2156-3985</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMFOwzAMhiMEEtPYC8AlRzi02MmSNkc0Npg0xKSVwa2KUncLlBal3YG3p2PTLEv-Jfvz4WPsGiFGBHOfTZYvWSwARSww1cIkZ2wgUOlImlSdn7KCSzZq20_oS6WQgBywDxk98qV1X3bj6w1_992WZ9vQ7DbbaOUr75qar73lt9lqfcfLJvBpRa4L3tmK27rgs2rnC-_4vO4o9Nd1v_VN3V6xi9JWLY2Oc8jeZtNs8hwtXp_mk4dF5IROukiRQKMMGKK-hZUJulK61KoxQGqR0LjSCidRF0IWlkoYG61BSARXkJBDJg5_XWjaNlCZ_wT_bcNvjpDv9eT_evK9nvyop4duDpAnohOgxwjSGPkHng1gTw</recordid><startdate>20130201</startdate><enddate>20130201</enddate><creator>Khan, N.</creator><creator>Li Hong Yu</creator><creator>Tan Siow Pin</creator><creator>Soon Wee Ho</creator><creator>Kripesh, V.</creator><creator>Pinjala, D.</creator><creator>Lau, J. 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H.</creatorcontrib><creatorcontrib>Toh Kok Chuan</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE transactions on components, packaging, and manufacturing technology (2011)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Khan, N.</au><au>Li Hong Yu</au><au>Tan Siow Pin</au><au>Soon Wee Ho</au><au>Kripesh, V.</au><au>Pinjala, D.</au><au>Lau, J. H.</au><au>Toh Kok Chuan</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections</atitle><jtitle>IEEE transactions on components, packaging, and manufacturing technology (2011)</jtitle><stitle>TCPMT</stitle><date>2013-02-01</date><risdate>2013</risdate><volume>3</volume><issue>2</issue><spage>221</spage><epage>228</epage><pages>221-228</pages><issn>2156-3950</issn><eissn>2156-3985</eissn><coden>ITCPC8</coden><abstract>In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated liquid cooling solution for 100 W from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed.</abstract><pub>IEEE</pub><doi>10.1109/TCPMT.2012.2186297</doi><tpages>8</tpages></addata></record> |
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| ispartof | IEEE transactions on components, packaging, and manufacturing technology (2011), 2013-02, Vol.3 (2), p.221-228 |
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| subjects | 3-D packaging Heat transfer Heating Liquid cooling micro-channel cooling Thermal resistance Through-silicon vias |
| title | 3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections |
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