Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages
In this paper, an efficient cascaded microwave network approach is presented for power and signal integrity analysis of multilayer printed-circuit boards (PCBs) and advanced electronic packages with multiple signal traces, multiple power-ground plates, multiple vias, and external loads such as decou...
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Veröffentlicht in: | IEEE transactions on components, packaging, and manufacturing technology (2011) packaging, and manufacturing technology (2011), 2011-09, Vol.1 (9), p.1428-1437 |
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creator | ZAW OO, Zaw LIU, En-Xiao XING CHANG WEI YAOJIANG ZHANG LI, Er-Ping |
description | In this paper, an efficient cascaded microwave network approach is presented for power and signal integrity analysis of multilayer printed-circuit boards (PCBs) and advanced electronic packages with multiple signal traces, multiple power-ground plates, multiple vias, and external loads such as decoupling capacitors. Each parallel-plate pair, which consists of two consecutive conductor plates functioning as either power or ground in the PCBs or packages, is modeled as one individual microwave network. Equivalent circuits are used in the microwave network to model the vias, and a parallel-plate impedance matrix is formulated to account for the wave interactions between the vias and the boundary of the PCB or package. If signal traces are present in a plate pair, a modal decomposition and recombination approach is employed to model two associated modes: the transmission line mode for the signal traces, and the parallel-plate mode for the power-ground plate pair. The microwave networks for each plate pair are finally cascaded together by enforcing the continuity of the voltages and currents at the via clearance holes in the conductor plate shared by two consecutive plate pairs. Numerical validation reveals that the cascaded microwave network approach produces accurate simulation results with much less central processing unit time and memory requirements than 3-D full-wave approaches. |
doi_str_mv | 10.1109/TCPMT.2011.2143712 |
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Each parallel-plate pair, which consists of two consecutive conductor plates functioning as either power or ground in the PCBs or packages, is modeled as one individual microwave network. Equivalent circuits are used in the microwave network to model the vias, and a parallel-plate impedance matrix is formulated to account for the wave interactions between the vias and the boundary of the PCB or package. If signal traces are present in a plate pair, a modal decomposition and recombination approach is employed to model two associated modes: the transmission line mode for the signal traces, and the parallel-plate mode for the power-ground plate pair. The microwave networks for each plate pair are finally cascaded together by enforcing the continuity of the voltages and currents at the via clearance holes in the conductor plate shared by two consecutive plate pairs. Numerical validation reveals that the cascaded microwave network approach produces accurate simulation results with much less central processing unit time and memory requirements than 3-D full-wave approaches.</description><identifier>ISSN: 2156-3950</identifier><identifier>EISSN: 2156-3985</identifier><identifier>DOI: 10.1109/TCPMT.2011.2143712</identifier><identifier>CODEN: ITCPC8</identifier><language>eng</language><publisher>Piscataway, NJ: IEEE</publisher><subject>Admittance ; Applied sciences ; Capacitors ; Cascaded microwave network ; Conductors ; Design. Technologies. Operation analysis. Testing ; Dielectric, amorphous and glass solid devices ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; electronic package ; Electronics ; Exact sciences and technology ; Integrated circuit modeling ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Microwave circuits ; modal decomposition and recombination ; power and signal integrity ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Stripline ; via circuit model</subject><ispartof>IEEE transactions on components, packaging, and manufacturing technology (2011), 2011-09, Vol.1 (9), p.1428-1437</ispartof><rights>2015 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c297t-c3c41f5da58b9ba6e8a62655572374b09fb6b58468d915f5d97c53725bdaf82c3</citedby><cites>FETCH-LOGICAL-c297t-c3c41f5da58b9ba6e8a62655572374b09fb6b58468d915f5d97c53725bdaf82c3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5975209$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5975209$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=24758502$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>ZAW OO, Zaw</creatorcontrib><creatorcontrib>LIU, En-Xiao</creatorcontrib><creatorcontrib>XING CHANG WEI</creatorcontrib><creatorcontrib>YAOJIANG ZHANG</creatorcontrib><creatorcontrib>LI, Er-Ping</creatorcontrib><title>Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages</title><title>IEEE transactions on components, packaging, and manufacturing technology (2011)</title><addtitle>TCPMT</addtitle><description>In this paper, an efficient cascaded microwave network approach is presented for power and signal integrity analysis of multilayer printed-circuit boards (PCBs) and advanced electronic packages with multiple signal traces, multiple power-ground plates, multiple vias, and external loads such as decoupling capacitors. Each parallel-plate pair, which consists of two consecutive conductor plates functioning as either power or ground in the PCBs or packages, is modeled as one individual microwave network. Equivalent circuits are used in the microwave network to model the vias, and a parallel-plate impedance matrix is formulated to account for the wave interactions between the vias and the boundary of the PCB or package. If signal traces are present in a plate pair, a modal decomposition and recombination approach is employed to model two associated modes: the transmission line mode for the signal traces, and the parallel-plate mode for the power-ground plate pair. The microwave networks for each plate pair are finally cascaded together by enforcing the continuity of the voltages and currents at the via clearance holes in the conductor plate shared by two consecutive plate pairs. Numerical validation reveals that the cascaded microwave network approach produces accurate simulation results with much less central processing unit time and memory requirements than 3-D full-wave approaches.</description><subject>Admittance</subject><subject>Applied sciences</subject><subject>Capacitors</subject><subject>Cascaded microwave network</subject><subject>Conductors</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Dielectric, amorphous and glass solid devices</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>electronic package</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuit modeling</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Microwave circuits</subject><subject>modal decomposition and recombination</subject><subject>power and signal integrity</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Stripline</subject><subject>via circuit model</subject><issn>2156-3950</issn><issn>2156-3985</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2011</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kF1PwjAUhhujiQT5A3rTGy_Bfuys6yVZUElAScTrpetarIxtaadk_95NCOfmnKbPe5LzIHRPyYxSIp-26Wa9nTFC6YzRiAvKrtCIUYinXCZwfZmB3KJJCN-kL0iIIHyEDqkKWhWmwGunfX1Uvwa_mfZY-z2eN42vlf7CtvZ4Ux-Nx6oq8IfbVarEy6o1O-_aDs_7ZxdcwLXF65-ydaXqenZRGt36unIab5Teq50Jd-jGqjKYybmP0efzYpu-TlfvL8t0vppqJkU71VxH1EKhIMllrmKTqJjFACAYF1FOpM3jHJIoTgpJoQel0MAFg7xQNmGajxE77e1PCsEbmzXeHZTvMkqywVn27ywbnGVnZ33o8RRqBiWl9arSLlySLBKQABm4hxPnjDGXb5ACGJH8D5W7dlI</recordid><startdate>20110901</startdate><enddate>20110901</enddate><creator>ZAW OO, Zaw</creator><creator>LIU, En-Xiao</creator><creator>XING CHANG WEI</creator><creator>YAOJIANG ZHANG</creator><creator>LI, Er-Ping</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20110901</creationdate><title>Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages</title><author>ZAW OO, Zaw ; LIU, En-Xiao ; XING CHANG WEI ; YAOJIANG ZHANG ; LI, Er-Ping</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c297t-c3c41f5da58b9ba6e8a62655572374b09fb6b58468d915f5d97c53725bdaf82c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2011</creationdate><topic>Admittance</topic><topic>Applied sciences</topic><topic>Capacitors</topic><topic>Cascaded microwave network</topic><topic>Conductors</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Dielectric, amorphous and glass solid devices</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>electronic package</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Integrated circuit modeling</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Microwave circuits</topic><topic>modal decomposition and recombination</topic><topic>power and signal integrity</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Stripline</topic><topic>via circuit model</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>ZAW OO, Zaw</creatorcontrib><creatorcontrib>LIU, En-Xiao</creatorcontrib><creatorcontrib>XING CHANG WEI</creatorcontrib><creatorcontrib>YAOJIANG ZHANG</creatorcontrib><creatorcontrib>LI, Er-Ping</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE/IET Electronic Library</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on components, packaging, and manufacturing technology (2011)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZAW OO, Zaw</au><au>LIU, En-Xiao</au><au>XING CHANG WEI</au><au>YAOJIANG ZHANG</au><au>LI, Er-Ping</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages</atitle><jtitle>IEEE transactions on components, packaging, and manufacturing technology (2011)</jtitle><stitle>TCPMT</stitle><date>2011-09-01</date><risdate>2011</risdate><volume>1</volume><issue>9</issue><spage>1428</spage><epage>1437</epage><pages>1428-1437</pages><issn>2156-3950</issn><eissn>2156-3985</eissn><coden>ITCPC8</coden><abstract>In this paper, an efficient cascaded microwave network approach is presented for power and signal integrity analysis of multilayer printed-circuit boards (PCBs) and advanced electronic packages with multiple signal traces, multiple power-ground plates, multiple vias, and external loads such as decoupling capacitors. Each parallel-plate pair, which consists of two consecutive conductor plates functioning as either power or ground in the PCBs or packages, is modeled as one individual microwave network. Equivalent circuits are used in the microwave network to model the vias, and a parallel-plate impedance matrix is formulated to account for the wave interactions between the vias and the boundary of the PCB or package. If signal traces are present in a plate pair, a modal decomposition and recombination approach is employed to model two associated modes: the transmission line mode for the signal traces, and the parallel-plate mode for the power-ground plate pair. The microwave networks for each plate pair are finally cascaded together by enforcing the continuity of the voltages and currents at the via clearance holes in the conductor plate shared by two consecutive plate pairs. Numerical validation reveals that the cascaded microwave network approach produces accurate simulation results with much less central processing unit time and memory requirements than 3-D full-wave approaches.</abstract><cop>Piscataway, NJ</cop><pub>IEEE</pub><doi>10.1109/TCPMT.2011.2143712</doi><tpages>10</tpages></addata></record> |
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subjects | Admittance Applied sciences Capacitors Cascaded microwave network Conductors Design. Technologies. Operation analysis. Testing Dielectric, amorphous and glass solid devices Electronic equipment and fabrication. Passive components, printed wiring boards, connectics electronic package Electronics Exact sciences and technology Integrated circuit modeling Integrated circuits Integrated circuits by function (including memories and processors) Microwave circuits modal decomposition and recombination power and signal integrity Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Stripline via circuit model |
title | Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages |
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