NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning

Neuro-inspired architectures based on synaptic memory arrays have been proposed for on-chip acceleration of weighted sum and weight update in machine/deep learning algorithms. In this paper, we developed NeuroSim, a circuit-level macro model that estimates the area, latency, dynamic energy, and leak...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems 2018-12, Vol.37 (12), p.3067-3080
Hauptverfasser: Chen, Pai-Yu, Peng, Xiaochen, Yu, Shimeng
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Sprache:eng
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