Contactless Pre-Bond TSV Test and Diagnosis Using Ring Oscillators and Multiple Voltage Levels

Defects in through-silicon vias (TSVs) due to fabrication steps decrease the yield and reliability of 3-D stacked integrated circuits, hence these defects need to be screened early in the manufacturing flow. Before wafer thinning, TSVs are buried in silicon and cannot be mechanically contacted, whic...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2014-05, Vol.33 (5), p.774-785
Hauptverfasser:	Deutsch, Sergej, Chakrabarty, Krishnendu
Format:	Artikel
Sprache:	eng
Schlagworte:	Circuit faults Defects Delay Electric potential Integrated circuit modeling Integrated circuits Mathematical models Oscillators Propagation delay Ring oscillators Testing Thinning Through-silicon vias Voltage
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