Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics
Recent advances in digital microfluidic biochips have led to a promising future for miniaturized laboratories, with the associated advantages of high sensitivity and reconfigurability. Since sample preparation plays an important front-end role in assays and laboratories in biochemical applications,...
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Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 2014-02, Vol.33 (2), p.183-196 |
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creator | Yi-Ling Hsieh Tsung-Yi Ho Chakrabarty, Krishnendu |
description | Recent advances in digital microfluidic biochips have led to a promising future for miniaturized laboratories, with the associated advantages of high sensitivity and reconfigurability. Since sample preparation plays an important front-end role in assays and laboratories in biochemical applications, and most of the analysis time is associated with sample collection, transportation, and preparation, it is important to minimize the time required for this key step in bioassays. Moreover, it is also critical to ensure the correctness of intermediate steps and recover from errors efficiently during sample preparation. We describe an optimization algorithm and the associated chip design method for sample preparation, including architectural synthesis and layout synthesis. We also present the first dynamic error recovery procedure for use during sample preparation. The proposed algorithm is evaluated on both real-life biochemical applications and synthetic test cases to demonstrate its effectiveness and efficiency. Compared to prior work, the proposed algorithm can achieve up to 50% reduction in sample preparation time, and the optimized chip layout can achieve over 40% reduction in sample preparation time. |
doi_str_mv | 10.1109/TCAD.2013.2284010 |
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Since sample preparation plays an important front-end role in assays and laboratories in biochemical applications, and most of the analysis time is associated with sample collection, transportation, and preparation, it is important to minimize the time required for this key step in bioassays. Moreover, it is also critical to ensure the correctness of intermediate steps and recover from errors efficiently during sample preparation. We describe an optimization algorithm and the associated chip design method for sample preparation, including architectural synthesis and layout synthesis. We also present the first dynamic error recovery procedure for use during sample preparation. The proposed algorithm is evaluated on both real-life biochemical applications and synthetic test cases to demonstrate its effectiveness and efficiency. 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(IEEE) Feb 2014</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c326t-2c70af252e8206bcf514bd5b0ea9c50b72a092289a1d7d6c4b030d87e06aeafd3</citedby><cites>FETCH-LOGICAL-c326t-2c70af252e8206bcf514bd5b0ea9c50b72a092289a1d7d6c4b030d87e06aeafd3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6714626$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6714626$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Yi-Ling Hsieh</creatorcontrib><creatorcontrib>Tsung-Yi Ho</creatorcontrib><creatorcontrib>Chakrabarty, Krishnendu</creatorcontrib><title>Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description>Recent advances in digital microfluidic biochips have led to a promising future for miniaturized laboratories, with the associated advantages of high sensitivity and reconfigurability. Since sample preparation plays an important front-end role in assays and laboratories in biochemical applications, and most of the analysis time is associated with sample collection, transportation, and preparation, it is important to minimize the time required for this key step in bioassays. Moreover, it is also critical to ensure the correctness of intermediate steps and recover from errors efficiently during sample preparation. We describe an optimization algorithm and the associated chip design method for sample preparation, including architectural synthesis and layout synthesis. We also present the first dynamic error recovery procedure for use during sample preparation. The proposed algorithm is evaluated on both real-life biochemical applications and synthetic test cases to demonstrate its effectiveness and efficiency. Compared to prior work, the proposed algorithm can achieve up to 50% reduction in sample preparation time, and the optimized chip layout can achieve over 40% reduction in sample preparation time.</description><subject>Algorithm design and analysis</subject><subject>Algorithms</subject><subject>Chromatography</subject><subject>Digital microfluidics</subject><subject>error recovery</subject><subject>Heuristic algorithms</subject><subject>Laboratories</subject><subject>Layout</subject><subject>Mixers</subject><subject>sample preparation</subject><subject>Sensors</subject><subject>Spectrum analysis</subject><subject>synthesis</subject><subject>System-on-chip</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpdkE1r3DAQhkVpIdu0PyD0IsglF29mJFmyjsluviChpUnOQpbHiYLXdiRvYf99vWzooadh4HmHeR_GThCWiGDPn1YX66UAlEshKgUIn9gCrTSFwhI_swUIUxUABo7Y15zfAFCVwi6Yu4xDeI0jf9z10yvlmLnvG77e9X4TA79KaUj8N4XhD6Udb-fl0W_GjvivRKNPfopDz59z7F_4Or7EyXf8IYY0tN02NjHkb-xL67tM3z_mMXu-vnpa3Rb3P2_uVhf3RZBCT4UIBnwrSkGVAF2HtkRVN2UN5G0ooTbCg52bWY-NaXRQNUhoKkOgPfm2kcfs7HB3TMP7lvLkNjEH6jrf07DNDkvQUlsl1Yye_oe-DdvUz985VBYqK9GUM4UHai6Tc6LWjSlufNo5BLdX7vbK3V65-1A-Z34cMpGI_vHaoNJCy78ENHz3</recordid><startdate>201402</startdate><enddate>201402</enddate><creator>Yi-Ling Hsieh</creator><creator>Tsung-Yi Ho</creator><creator>Chakrabarty, Krishnendu</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Since sample preparation plays an important front-end role in assays and laboratories in biochemical applications, and most of the analysis time is associated with sample collection, transportation, and preparation, it is important to minimize the time required for this key step in bioassays. Moreover, it is also critical to ensure the correctness of intermediate steps and recover from errors efficiently during sample preparation. We describe an optimization algorithm and the associated chip design method for sample preparation, including architectural synthesis and layout synthesis. We also present the first dynamic error recovery procedure for use during sample preparation. The proposed algorithm is evaluated on both real-life biochemical applications and synthetic test cases to demonstrate its effectiveness and efficiency. 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source | IEEE Electronic Library (IEL) |
subjects | Algorithm design and analysis Algorithms Chromatography Digital microfluidics error recovery Heuristic algorithms Laboratories Layout Mixers sample preparation Sensors Spectrum analysis synthesis System-on-chip |
title | Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics |
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