A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing
The lower bound on the power expended by an RC relaxation oscillator is decided by the RC network. This can be minimized by reducing the oscillation swing and increasing R. In the former technique, tighter comparator constraints limit power benefits while the latter technique increases resistor ther...
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| Veröffentlicht in: | IEEE solid-state circuits letters 2019-09, Vol.2 (9), p.175-178 |
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| creator | Fan, Philex Ming-Yan Savanth, Anand Labbe, Benoit Prabhat, Pranay Myers, James |
| description | The lower bound on the power expended by an RC relaxation oscillator is decided by the RC network. This can be minimized by reducing the oscillation swing and increasing R. In the former technique, tighter comparator constraints limit power benefits while the latter technique increases resistor thermal noise bounding long-term jitter. To this end, this letter presents a fully integrated RC oscillator with core voltage aggressively scaled to subthreshold levels. A self-clocked switched-capacitor network is used to minimize voltage drop-out power loss. Full forward-body-biasing technique helps reduce device on-resistance. Additionally, temperature coefficient compensation for time constant is accomplished by poly resistors and a VTH-tracking reference scheme which avoids the use of diffusion resistors. This design is silicon-proven on 65-nm CMOS (0.0356-mm 2 area). The implementation has a 33-kHz clock with 32.2 nW at 1.2 V. Line sensitivity is within +0.7/-0.6% per volt across 16 samples for 1 to 1.5 V. Temperature sensitivity was measured to be 56 ppm/°C from 0°C to 85°C and measured Allan deviation |
| doi_str_mv | 10.1109/LSSC.2019.2935571 |
| format | Article |
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This can be minimized by reducing the oscillation swing and increasing R. In the former technique, tighter comparator constraints limit power benefits while the latter technique increases resistor thermal noise bounding long-term jitter. To this end, this letter presents a fully integrated RC oscillator with core voltage aggressively scaled to subthreshold levels. A self-clocked switched-capacitor network is used to minimize voltage drop-out power loss. Full forward-body-biasing technique helps reduce device on-resistance. Additionally, temperature coefficient compensation for time constant is accomplished by poly resistors and a VTH-tracking reference scheme which avoids the use of diffusion resistors. This design is silicon-proven on 65-nm CMOS (0.0356-mm 2 area). The implementation has a 33-kHz clock with 32.2 nW at 1.2 V. Line sensitivity is within +0.7/-0.6% per volt across 16 samples for 1 to 1.5 V. Temperature sensitivity was measured to be 56 ppm/°C from 0°C to 85°C and measured Allan deviation <; 100 ppm for averaging interval of τ = 400 s and <; 40 ppm for τ = 3000 s.</description><identifier>ISSN: 2573-9603</identifier><identifier>EISSN: 2573-9603</identifier><identifier>DOI: 10.1109/LSSC.2019.2935571</identifier><identifier>CODEN: ISCLCN</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject><italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator (RCO) ; Capacitors ; CMOS ; Forward-body-biasing (FBB) ; Generators ; Lower bounds ; Oscillators ; Power loss ; Relaxation oscillators ; Resistors ; Sensitivity ; subthreshold-region operation ; switched-capacitor network (SCN) ; Temperature measurement ; Temperature sensors ; Thermal noise ; Time constant ; Vibration ; Voltage drop</subject><ispartof>IEEE solid-state circuits letters, 2019-09, Vol.2 (9), p.175-178</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c363t-77581f5a878adee47bd4c13bf99420e47c3f8e2da4ab57802cbd373a44b411143</citedby><cites>FETCH-LOGICAL-c363t-77581f5a878adee47bd4c13bf99420e47c3f8e2da4ab57802cbd373a44b411143</cites><orcidid>0000-0002-4454-5323 ; 0000-0003-3495-0525 ; 0000-0001-8445-9844</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8877952$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8877952$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Fan, Philex Ming-Yan</creatorcontrib><creatorcontrib>Savanth, Anand</creatorcontrib><creatorcontrib>Labbe, Benoit</creatorcontrib><creatorcontrib>Prabhat, Pranay</creatorcontrib><creatorcontrib>Myers, James</creatorcontrib><title>A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing</title><title>IEEE solid-state circuits letters</title><addtitle>LSSC</addtitle><description>The lower bound on the power expended by an RC relaxation oscillator is decided by the RC network. This can be minimized by reducing the oscillation swing and increasing R. In the former technique, tighter comparator constraints limit power benefits while the latter technique increases resistor thermal noise bounding long-term jitter. To this end, this letter presents a fully integrated RC oscillator with core voltage aggressively scaled to subthreshold levels. A self-clocked switched-capacitor network is used to minimize voltage drop-out power loss. Full forward-body-biasing technique helps reduce device on-resistance. Additionally, temperature coefficient compensation for time constant is accomplished by poly resistors and a VTH-tracking reference scheme which avoids the use of diffusion resistors. This design is silicon-proven on 65-nm CMOS (0.0356-mm 2 area). The implementation has a 33-kHz clock with 32.2 nW at 1.2 V. Line sensitivity is within +0.7/-0.6% per volt across 16 samples for 1 to 1.5 V. Temperature sensitivity was measured to be 56 ppm/°C from 0°C to 85°C and measured Allan deviation <; 100 ppm for averaging interval of τ = 400 s and <; 40 ppm for τ = 3000 s.</description><subject><italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator (RCO)</subject><subject>Capacitors</subject><subject>CMOS</subject><subject>Forward-body-biasing (FBB)</subject><subject>Generators</subject><subject>Lower bounds</subject><subject>Oscillators</subject><subject>Power loss</subject><subject>Relaxation oscillators</subject><subject>Resistors</subject><subject>Sensitivity</subject><subject>subthreshold-region operation</subject><subject>switched-capacitor network (SCN)</subject><subject>Temperature measurement</subject><subject>Temperature sensors</subject><subject>Thermal noise</subject><subject>Time constant</subject><subject>Vibration</subject><subject>Voltage drop</subject><issn>2573-9603</issn><issn>2573-9603</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNkF9rwjAUxcPYYLL5AcZeAnuO5l-b5FHLnIIg6IaPIW1SrXatS1qG-_RrUcaezrnc37kXDgBPBI8IwWq83GySEcVEjahiUSTIDRjQSDCkYsxu__l7MAzhgHGHkphhOQDHCcQjJVG1HR_nP5Ax1MusLcszXFSN23nTOAs3bdrsvQv7urRo7XZFXcHVyXXL3q0TuApZUZamqT3cFs0ezmr_bbxF09qe0bQwoah2j-AuN2Vww6s-gI_Z63syR8vV2yKZLFHGYtYgISJJ8shIIY11jovU8oywNFeKU9zNGculo9Zwk0ZCYpqllglmOE85IYSzB_ByuXvy9VfrQqMPdeur7qWmDAuqFBFxR5ELlfk6BO9yffLFp_FnTbDua9V9rbqvVV9r7TLPl0zhnPvjpRRCRZT9Ahf1ceE</recordid><startdate>20190901</startdate><enddate>20190901</enddate><creator>Fan, Philex Ming-Yan</creator><creator>Savanth, Anand</creator><creator>Labbe, Benoit</creator><creator>Prabhat, Pranay</creator><creator>Myers, James</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-4454-5323</orcidid><orcidid>https://orcid.org/0000-0003-3495-0525</orcidid><orcidid>https://orcid.org/0000-0001-8445-9844</orcidid></search><sort><creationdate>20190901</creationdate><title>A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing</title><author>Fan, Philex Ming-Yan ; Savanth, Anand ; Labbe, Benoit ; Prabhat, Pranay ; Myers, James</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c363t-77581f5a878adee47bd4c13bf99420e47c3f8e2da4ab57802cbd373a44b411143</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic><italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator (RCO)</topic><topic>Capacitors</topic><topic>CMOS</topic><topic>Forward-body-biasing (FBB)</topic><topic>Generators</topic><topic>Lower bounds</topic><topic>Oscillators</topic><topic>Power loss</topic><topic>Relaxation oscillators</topic><topic>Resistors</topic><topic>Sensitivity</topic><topic>subthreshold-region operation</topic><topic>switched-capacitor network (SCN)</topic><topic>Temperature measurement</topic><topic>Temperature sensors</topic><topic>Thermal noise</topic><topic>Time constant</topic><topic>Vibration</topic><topic>Voltage drop</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Fan, Philex Ming-Yan</creatorcontrib><creatorcontrib>Savanth, Anand</creatorcontrib><creatorcontrib>Labbe, Benoit</creatorcontrib><creatorcontrib>Prabhat, Pranay</creatorcontrib><creatorcontrib>Myers, James</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE solid-state circuits letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fan, Philex Ming-Yan</au><au>Savanth, Anand</au><au>Labbe, Benoit</au><au>Prabhat, Pranay</au><au>Myers, James</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing</atitle><jtitle>IEEE solid-state circuits letters</jtitle><stitle>LSSC</stitle><date>2019-09-01</date><risdate>2019</risdate><volume>2</volume><issue>9</issue><spage>175</spage><epage>178</epage><pages>175-178</pages><issn>2573-9603</issn><eissn>2573-9603</eissn><coden>ISCLCN</coden><abstract>The lower bound on the power expended by an RC relaxation oscillator is decided by the RC network. This can be minimized by reducing the oscillation swing and increasing R. In the former technique, tighter comparator constraints limit power benefits while the latter technique increases resistor thermal noise bounding long-term jitter. To this end, this letter presents a fully integrated RC oscillator with core voltage aggressively scaled to subthreshold levels. A self-clocked switched-capacitor network is used to minimize voltage drop-out power loss. Full forward-body-biasing technique helps reduce device on-resistance. Additionally, temperature coefficient compensation for time constant is accomplished by poly resistors and a VTH-tracking reference scheme which avoids the use of diffusion resistors. This design is silicon-proven on 65-nm CMOS (0.0356-mm 2 area). The implementation has a 33-kHz clock with 32.2 nW at 1.2 V. Line sensitivity is within +0.7/-0.6% per volt across 16 samples for 1 to 1.5 V. Temperature sensitivity was measured to be 56 ppm/°C from 0°C to 85°C and measured Allan deviation <; 100 ppm for averaging interval of τ = 400 s and <; 40 ppm for τ = 3000 s.</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/LSSC.2019.2935571</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0002-4454-5323</orcidid><orcidid>https://orcid.org/0000-0003-3495-0525</orcidid><orcidid>https://orcid.org/0000-0001-8445-9844</orcidid></addata></record> |
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| subjects | <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">RC oscillator (RCO) Capacitors CMOS Forward-body-biasing (FBB) Generators Lower bounds Oscillators Power loss Relaxation oscillators Resistors Sensitivity subthreshold-region operation switched-capacitor network (SCN) Temperature measurement Temperature sensors Thermal noise Time constant Vibration Voltage drop |
| title | A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing |
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