A Low Noise D-Band VCO With a Wide Bandwidth and a Steady Output Power
A 129-159 GHz frequency synthesizer is implemented using a low phase noise (PN) 43-53 GHz VCO core driving a featured tunable differential tripler. The load of the proposed tripler can be tuned to the third harmonic of the input frequency to adaptively maximize the output power over the entire range...
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Veröffentlicht in: | IEEE microwave and wireless components letters 2015-11, Vol.25 (11), p.742-744 |
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creator | Holisaz, Hamed Safavi-Naeini, Safieddin |
description | A 129-159 GHz frequency synthesizer is implemented using a low phase noise (PN) 43-53 GHz VCO core driving a featured tunable differential tripler. The load of the proposed tripler can be tuned to the third harmonic of the input frequency to adaptively maximize the output power over the entire range of output bandwidth. The fabricated chip achieves maximum output power of -8 dBm, and the average PN for the VCO core is -99.6 dBc/Hz and -115.5 dBc/Hz at 1 MHz and 10 MHz offsets, respectively. Having the frequency tuning range of almost 30 GHz, this is the widest-band width, 65 nm D-band CMOS signal source reported to this date which can precisely sustain the high output power at its wide output bandwidth. The synthesizer consumes 95 mW of power, which corresponds to an average FOM of -173 dBc/Hz. Suppression of unwanted harmonics is better than 31 dBc across the entire bandwidth. The core design occupies only 300 × 250 μm. |
doi_str_mv | 10.1109/LMWC.2015.2481083 |
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The load of the proposed tripler can be tuned to the third harmonic of the input frequency to adaptively maximize the output power over the entire range of output bandwidth. The fabricated chip achieves maximum output power of -8 dBm, and the average PN for the VCO core is -99.6 dBc/Hz and -115.5 dBc/Hz at 1 MHz and 10 MHz offsets, respectively. Having the frequency tuning range of almost 30 GHz, this is the widest-band width, 65 nm D-band CMOS signal source reported to this date which can precisely sustain the high output power at its wide output bandwidth. The synthesizer consumes 95 mW of power, which corresponds to an average FOM of -173 dBc/Hz. Suppression of unwanted harmonics is better than 31 dBc across the entire bandwidth. The core design occupies only 300 × 250 μm.</description><identifier>ISSN: 1531-1309</identifier><identifier>ISSN: 2771-957X</identifier><identifier>EISSN: 1558-1764</identifier><identifier>EISSN: 2771-9588</identifier><identifier>DOI: 10.1109/LMWC.2015.2481083</identifier><identifier>CODEN: IMWCBJ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Bandwidth ; Bandwidths ; Figure of merits ; Frequency synthesizers ; Harmonic analysis ; Phase noise ; Product design ; voltage control oscillator (VCO) ; Voltage-controlled oscillators</subject><ispartof>IEEE microwave and wireless components letters, 2015-11, Vol.25 (11), p.742-744</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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The load of the proposed tripler can be tuned to the third harmonic of the input frequency to adaptively maximize the output power over the entire range of output bandwidth. The fabricated chip achieves maximum output power of -8 dBm, and the average PN for the VCO core is -99.6 dBc/Hz and -115.5 dBc/Hz at 1 MHz and 10 MHz offsets, respectively. Having the frequency tuning range of almost 30 GHz, this is the widest-band width, 65 nm D-band CMOS signal source reported to this date which can precisely sustain the high output power at its wide output bandwidth. The synthesizer consumes 95 mW of power, which corresponds to an average FOM of -173 dBc/Hz. Suppression of unwanted harmonics is better than 31 dBc across the entire bandwidth. The core design occupies only 300 × 250 μm.</description><subject>Bandwidth</subject><subject>Bandwidths</subject><subject>Figure of merits</subject><subject>Frequency synthesizers</subject><subject>Harmonic analysis</subject><subject>Phase noise</subject><subject>Product design</subject><subject>voltage control oscillator (VCO)</subject><subject>Voltage-controlled oscillators</subject><issn>1531-1309</issn><issn>2771-957X</issn><issn>1558-1764</issn><issn>2771-9588</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kFtLw0AQhRdRsFZ_gPiy4HPizl6TxxqtCtEKXvq4bHY3mKJN3U0o_fcmtPg0w5lzZoYPoUsgKQDJb8rnZZFSAiKlPAOSsSM0ASGyBJTkx2PPIAFG8lN0FuOKEOAZhwmaz3DZbvFL20SP75Jbs3b4s1jgZdN9YTMU5_Eobhs3CsPU4LfOG7fDi77b9B1-bbc-nKOT2nxHf3GoU_Qxv38vHpNy8fBUzMrEMsm6xBohuBKQG-qlqWnlgIFjpHLDe0R5Z6mQTgKoytrK11XtKbNZlTnhFJeMTdH1fu8mtL-9j51etX1YDyc1KMYgU5Dngwv2LhvaGIOv9SY0PybsNBA94tIjLj3i0gdcQ-Zqn2m89_9-RXMhGWd_3FRjyA</recordid><startdate>20151101</startdate><enddate>20151101</enddate><creator>Holisaz, Hamed</creator><creator>Safavi-Naeini, Safieddin</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20151101</creationdate><title>A Low Noise D-Band VCO With a Wide Bandwidth and a Steady Output Power</title><author>Holisaz, Hamed ; Safavi-Naeini, Safieddin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c363t-ca5547519a2e6af2bd131d30bd53107edc256d6117bccbefbfe23c8b8d5d74633</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Bandwidth</topic><topic>Bandwidths</topic><topic>Figure of merits</topic><topic>Frequency synthesizers</topic><topic>Harmonic analysis</topic><topic>Phase noise</topic><topic>Product design</topic><topic>voltage control oscillator (VCO)</topic><topic>Voltage-controlled oscillators</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Holisaz, Hamed</creatorcontrib><creatorcontrib>Safavi-Naeini, Safieddin</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005–Present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE microwave and wireless components letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Holisaz, Hamed</au><au>Safavi-Naeini, Safieddin</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Low Noise D-Band VCO With a Wide Bandwidth and a Steady Output Power</atitle><jtitle>IEEE microwave and wireless components letters</jtitle><stitle>LMWC</stitle><date>2015-11-01</date><risdate>2015</risdate><volume>25</volume><issue>11</issue><spage>742</spage><epage>744</epage><pages>742-744</pages><issn>1531-1309</issn><issn>2771-957X</issn><eissn>1558-1764</eissn><eissn>2771-9588</eissn><coden>IMWCBJ</coden><abstract>A 129-159 GHz frequency synthesizer is implemented using a low phase noise (PN) 43-53 GHz VCO core driving a featured tunable differential tripler. The load of the proposed tripler can be tuned to the third harmonic of the input frequency to adaptively maximize the output power over the entire range of output bandwidth. The fabricated chip achieves maximum output power of -8 dBm, and the average PN for the VCO core is -99.6 dBc/Hz and -115.5 dBc/Hz at 1 MHz and 10 MHz offsets, respectively. Having the frequency tuning range of almost 30 GHz, this is the widest-band width, 65 nm D-band CMOS signal source reported to this date which can precisely sustain the high output power at its wide output bandwidth. The synthesizer consumes 95 mW of power, which corresponds to an average FOM of -173 dBc/Hz. Suppression of unwanted harmonics is better than 31 dBc across the entire bandwidth. The core design occupies only 300 × 250 μm.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LMWC.2015.2481083</doi><tpages>3</tpages></addata></record> |
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subjects | Bandwidth Bandwidths Figure of merits Frequency synthesizers Harmonic analysis Phase noise Product design voltage control oscillator (VCO) Voltage-controlled oscillators |
title | A Low Noise D-Band VCO With a Wide Bandwidth and a Steady Output Power |
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