High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer

High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE electron device letters 2023-09, Vol.44 (9), p.1404-1407
Hauptverfasser: Jia, Mao, Hou, Bin, Yang, Ling, Jia, Fuchun, Niu, Xuerui, Du, Jiale, Chang, Qingyuan, Zhang, Meng, Wu, Mei, Zhang, Xinchuang, Lu, Hao, Ma, Xiaohua, Hao, Yue
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 1407
container_issue 9
container_start_page 1404
container_title IEEE electron device letters
container_volume 44
creator Jia, Mao
Hou, Bin
Yang, Ling
Jia, Fuchun
Niu, Xuerui
Du, Jiale
Chang, Qingyuan
Zhang, Meng
Wu, Mei
Zhang, Xinchuang
Lu, Hao
Ma, Xiaohua
Hao, Yue
description
doi_str_mv 10.1109/LED.2023.3295064
format Article
fullrecord <record><control><sourceid>crossref</sourceid><recordid>TN_cdi_crossref_primary_10_1109_LED_2023_3295064</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>10_1109_LED_2023_3295064</sourcerecordid><originalsourceid>FETCH-LOGICAL-c884-dc6f5b43ce89f06b7df905f23b54aeedbbf464d9d66c57fd994b4c7064d591743</originalsourceid><addsrcrecordid>eNot0MFLwzAYBfAgCs7p3WP-gc4vzZe0Ocqca2E6karHkjSJi3TdSIvY_96N7fQODx68HyH3DGaMgXpYLZ5mKaR8xlMlQOIFmTAh8gSE5JdkAhmyhDOQ1-Sm738AGGKGE_JRhO8N_aRVQXVnabndx92vs3SpB0ffXRu0CW0YRho6-pYs9eupKRYvVU-_wrCh679g9RB2HS27wcVWjy7ekiuv297dnXNKqudFNS-S1XpZzh9XSZPnmNhGemGQNy5XHqTJrFcgfMqNQO2cNcajRKuslI3IvFUKDTbZ4ZwVimXIpwROs03c9X10vt7HsNVxrBnUR5X6oFIfVeqzCv8HybJUBQ</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer</title><source>IEEE Electronic Library (IEL)</source><creator>Jia, Mao ; Hou, Bin ; Yang, Ling ; Jia, Fuchun ; Niu, Xuerui ; Du, Jiale ; Chang, Qingyuan ; Zhang, Meng ; Wu, Mei ; Zhang, Xinchuang ; Lu, Hao ; Ma, Xiaohua ; Hao, Yue</creator><creatorcontrib>Jia, Mao ; Hou, Bin ; Yang, Ling ; Jia, Fuchun ; Niu, Xuerui ; Du, Jiale ; Chang, Qingyuan ; Zhang, Meng ; Wu, Mei ; Zhang, Xinchuang ; Lu, Hao ; Ma, Xiaohua ; Hao, Yue</creatorcontrib><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2023.3295064</identifier><language>eng</language><ispartof>IEEE electron device letters, 2023-09, Vol.44 (9), p.1404-1407</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c884-dc6f5b43ce89f06b7df905f23b54aeedbbf464d9d66c57fd994b4c7064d591743</citedby><cites>FETCH-LOGICAL-c884-dc6f5b43ce89f06b7df905f23b54aeedbbf464d9d66c57fd994b4c7064d591743</cites><orcidid>0000-0002-3189-7864 ; 0000-0003-2689-7621 ; 0000-0002-6518-7748 ; 0000-0001-7284-8180 ; 0000-0002-8081-2919 ; 0000-0002-1331-6253 ; 0000-0001-8827-1398 ; 0000-0002-5368-3699 ; 0000-0001-5041-0153 ; 0000-0002-3066-9755</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27923,27924</link.rule.ids></links><search><creatorcontrib>Jia, Mao</creatorcontrib><creatorcontrib>Hou, Bin</creatorcontrib><creatorcontrib>Yang, Ling</creatorcontrib><creatorcontrib>Jia, Fuchun</creatorcontrib><creatorcontrib>Niu, Xuerui</creatorcontrib><creatorcontrib>Du, Jiale</creatorcontrib><creatorcontrib>Chang, Qingyuan</creatorcontrib><creatorcontrib>Zhang, Meng</creatorcontrib><creatorcontrib>Wu, Mei</creatorcontrib><creatorcontrib>Zhang, Xinchuang</creatorcontrib><creatorcontrib>Lu, Hao</creatorcontrib><creatorcontrib>Ma, Xiaohua</creatorcontrib><creatorcontrib>Hao, Yue</creatorcontrib><title>High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer</title><title>IEEE electron device letters</title><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><recordid>eNot0MFLwzAYBfAgCs7p3WP-gc4vzZe0Ocqca2E6karHkjSJi3TdSIvY_96N7fQODx68HyH3DGaMgXpYLZ5mKaR8xlMlQOIFmTAh8gSE5JdkAhmyhDOQ1-Sm738AGGKGE_JRhO8N_aRVQXVnabndx92vs3SpB0ffXRu0CW0YRho6-pYs9eupKRYvVU-_wrCh679g9RB2HS27wcVWjy7ekiuv297dnXNKqudFNS-S1XpZzh9XSZPnmNhGemGQNy5XHqTJrFcgfMqNQO2cNcajRKuslI3IvFUKDTbZ4ZwVimXIpwROs03c9X10vt7HsNVxrBnUR5X6oFIfVeqzCv8HybJUBQ</recordid><startdate>202309</startdate><enddate>202309</enddate><creator>Jia, Mao</creator><creator>Hou, Bin</creator><creator>Yang, Ling</creator><creator>Jia, Fuchun</creator><creator>Niu, Xuerui</creator><creator>Du, Jiale</creator><creator>Chang, Qingyuan</creator><creator>Zhang, Meng</creator><creator>Wu, Mei</creator><creator>Zhang, Xinchuang</creator><creator>Lu, Hao</creator><creator>Ma, Xiaohua</creator><creator>Hao, Yue</creator><scope>AAYXX</scope><scope>CITATION</scope><orcidid>https://orcid.org/0000-0002-3189-7864</orcidid><orcidid>https://orcid.org/0000-0003-2689-7621</orcidid><orcidid>https://orcid.org/0000-0002-6518-7748</orcidid><orcidid>https://orcid.org/0000-0001-7284-8180</orcidid><orcidid>https://orcid.org/0000-0002-8081-2919</orcidid><orcidid>https://orcid.org/0000-0002-1331-6253</orcidid><orcidid>https://orcid.org/0000-0001-8827-1398</orcidid><orcidid>https://orcid.org/0000-0002-5368-3699</orcidid><orcidid>https://orcid.org/0000-0001-5041-0153</orcidid><orcidid>https://orcid.org/0000-0002-3066-9755</orcidid></search><sort><creationdate>202309</creationdate><title>High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer</title><author>Jia, Mao ; Hou, Bin ; Yang, Ling ; Jia, Fuchun ; Niu, Xuerui ; Du, Jiale ; Chang, Qingyuan ; Zhang, Meng ; Wu, Mei ; Zhang, Xinchuang ; Lu, Hao ; Ma, Xiaohua ; Hao, Yue</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c884-dc6f5b43ce89f06b7df905f23b54aeedbbf464d9d66c57fd994b4c7064d591743</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Jia, Mao</creatorcontrib><creatorcontrib>Hou, Bin</creatorcontrib><creatorcontrib>Yang, Ling</creatorcontrib><creatorcontrib>Jia, Fuchun</creatorcontrib><creatorcontrib>Niu, Xuerui</creatorcontrib><creatorcontrib>Du, Jiale</creatorcontrib><creatorcontrib>Chang, Qingyuan</creatorcontrib><creatorcontrib>Zhang, Meng</creatorcontrib><creatorcontrib>Wu, Mei</creatorcontrib><creatorcontrib>Zhang, Xinchuang</creatorcontrib><creatorcontrib>Lu, Hao</creatorcontrib><creatorcontrib>Ma, Xiaohua</creatorcontrib><creatorcontrib>Hao, Yue</creatorcontrib><collection>CrossRef</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Jia, Mao</au><au>Hou, Bin</au><au>Yang, Ling</au><au>Jia, Fuchun</au><au>Niu, Xuerui</au><au>Du, Jiale</au><au>Chang, Qingyuan</au><au>Zhang, Meng</au><au>Wu, Mei</au><au>Zhang, Xinchuang</au><au>Lu, Hao</au><au>Ma, Xiaohua</au><au>Hao, Yue</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer</atitle><jtitle>IEEE electron device letters</jtitle><date>2023-09</date><risdate>2023</risdate><volume>44</volume><issue>9</issue><spage>1404</spage><epage>1407</epage><pages>1404-1407</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><doi>10.1109/LED.2023.3295064</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0002-3189-7864</orcidid><orcidid>https://orcid.org/0000-0003-2689-7621</orcidid><orcidid>https://orcid.org/0000-0002-6518-7748</orcidid><orcidid>https://orcid.org/0000-0001-7284-8180</orcidid><orcidid>https://orcid.org/0000-0002-8081-2919</orcidid><orcidid>https://orcid.org/0000-0002-1331-6253</orcidid><orcidid>https://orcid.org/0000-0001-8827-1398</orcidid><orcidid>https://orcid.org/0000-0002-5368-3699</orcidid><orcidid>https://orcid.org/0000-0001-5041-0153</orcidid><orcidid>https://orcid.org/0000-0002-3066-9755</orcidid></addata></record>
fulltext fulltext
identifier ISSN: 0741-3106
ispartof IEEE electron device letters, 2023-09, Vol.44 (9), p.1404-1407
issn 0741-3106
1558-0563
language eng
recordid cdi_crossref_primary_10_1109_LED_2023_3295064
source IEEE Electronic Library (IEL)
title High V TH and Improved Gate Reliability in P-GaN Gate HEMTs With Oxidation Interlayer
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T08%3A15%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=High%20V%20TH%20and%20Improved%20Gate%20Reliability%20in%20P-GaN%20Gate%20HEMTs%20With%20Oxidation%20Interlayer&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Jia,%20Mao&rft.date=2023-09&rft.volume=44&rft.issue=9&rft.spage=1404&rft.epage=1407&rft.pages=1404-1407&rft.issn=0741-3106&rft.eissn=1558-0563&rft_id=info:doi/10.1109/LED.2023.3295064&rft_dat=%3Ccrossref%3E10_1109_LED_2023_3295064%3C/crossref%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true