Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability
A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the sem...
Gespeichert in:
| Veröffentlicht in: | IEEE electron device letters 2019-12, Vol.40 (12), p.1969-1972 |
|---|---|
| Hauptverfasser: | , , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 1972 |
|---|---|
| container_issue | 12 |
| container_start_page | 1969 |
| container_title | IEEE electron device letters |
| container_volume | 40 |
| creator | Zhang, Wentong Wang, Rui Cheng, Shikang Gu, SenYan Zhang, Sen He, Boyong Qiao, Ming Li, Zhaoji Zhang, Bo |
| description | A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the semi-SJ is introduced near the source. The semi-SJ increases the local doping concentration in the N regions meanwhile reduces the current path area and carrier mobility, resulting in the variation of CCs before and after the introduction of the semi-SJ. The normalized CC factor η C is proposed to evaluate this variation, with which the minimum specific on-resistance R ON,sp is predicted by the condition of η C = 1. The experiments of the semi-SJ LDMOS exhibit a minimum R ON,sp of 25.5 mΩ·cm 2 under a breakdown voltage V B of 464.3 V. This represents a reduction in R ON,sp by 37.7% when compared with the theoretical R ON,sp of triple RESURF devices. |
| doi_str_mv | 10.1109/LED.2019.2948198 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_LED_2019_2948198</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8876613</ieee_id><sourcerecordid>2322854254</sourcerecordid><originalsourceid>FETCH-LOGICAL-c291t-d6e9a51efe7f6ef2464bef34b827de48f04944be5451e80d6f2c8c2e22400c073</originalsourceid><addsrcrecordid>eNo9kEtPwzAQhC0EEqVwR-JiiXOK7TiOc4S0PKSIHgpny03WyFVetRNE--txacVpNbvf7GoHoVtKZpSS7KFYzGeM0GzGMi5pJs_QhCaJjEgi4nM0ISmnUUyJuERX3m8IoZynfIK2y36wjd3rwXYt1m2FFz89ONtAO3jcGVzoAZyu8QoaG63GMNuMbflHz-HbloCftIcKB_3euUbXdh9UPjoXNkS5dm5n2y-c616vbW2H3TW6MLr2cHOqU_T5vPjIX6Ni-fKWPxZRyTI6RJWATCcUDKRGgGFc8DWYmK8lSyvg0hCe8dBKeIAkqYRhpSwZMMYJKUkaT9H9cW_vuu0IflCbbnRtOKlYzJhMOEt4oMiRKl3nvQOj-vC8djtFiToEq0Kw6hCsOgUbLHdHiwWAf1zKVAgax7_ab3W3</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2322854254</pqid></control><display><type>article</type><title>Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability</title><source>IEEE Electronic Library (IEL)</source><creator>Zhang, Wentong ; Wang, Rui ; Cheng, Shikang ; Gu, SenYan ; Zhang, Sen ; He, Boyong ; Qiao, Ming ; Li, Zhaoji ; Zhang, Bo</creator><creatorcontrib>Zhang, Wentong ; Wang, Rui ; Cheng, Shikang ; Gu, SenYan ; Zhang, Sen ; He, Boyong ; Qiao, Ming ; Li, Zhaoji ; Zhang, Bo</creatorcontrib><description>A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the semi-SJ is introduced near the source. The semi-SJ increases the local doping concentration in the N regions meanwhile reduces the current path area and carrier mobility, resulting in the variation of CCs before and after the introduction of the semi-SJ. The normalized CC factor η C is proposed to evaluate this variation, with which the minimum specific on-resistance R ON,sp is predicted by the condition of η C = 1. The experiments of the semi-SJ LDMOS exhibit a minimum R ON,sp of 25.5 mΩ·cm 2 under a breakdown voltage V B of 464.3 V. This represents a reduction in R ON,sp by 37.7% when compared with the theoretical R ON,sp of triple RESURF devices.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2019.2948198</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>breakdown voltage (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">V B) ; Carrier mobility ; Current carriers ; Current measurement ; Doping ; Metal oxide semiconductors ; normalized current-carrying capability ; Optimization ; semi-SJ LDMOS ; sp ; specific on-resistance (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">R ON ; Substrates ; Superjunction ; Transistors ; Voltage control</subject><ispartof>IEEE electron device letters, 2019-12, Vol.40 (12), p.1969-1972</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-d6e9a51efe7f6ef2464bef34b827de48f04944be5451e80d6f2c8c2e22400c073</citedby><cites>FETCH-LOGICAL-c291t-d6e9a51efe7f6ef2464bef34b827de48f04944be5451e80d6f2c8c2e22400c073</cites><orcidid>0000-0001-9221-3318 ; 0000-0001-6325-9878 ; 0000-0002-8119-5000</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8876613$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8876613$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Zhang, Wentong</creatorcontrib><creatorcontrib>Wang, Rui</creatorcontrib><creatorcontrib>Cheng, Shikang</creatorcontrib><creatorcontrib>Gu, SenYan</creatorcontrib><creatorcontrib>Zhang, Sen</creatorcontrib><creatorcontrib>He, Boyong</creatorcontrib><creatorcontrib>Qiao, Ming</creatorcontrib><creatorcontrib>Li, Zhaoji</creatorcontrib><creatorcontrib>Zhang, Bo</creatorcontrib><title>Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the semi-SJ is introduced near the source. The semi-SJ increases the local doping concentration in the N regions meanwhile reduces the current path area and carrier mobility, resulting in the variation of CCs before and after the introduction of the semi-SJ. The normalized CC factor η C is proposed to evaluate this variation, with which the minimum specific on-resistance R ON,sp is predicted by the condition of η C = 1. The experiments of the semi-SJ LDMOS exhibit a minimum R ON,sp of 25.5 mΩ·cm 2 under a breakdown voltage V B of 464.3 V. This represents a reduction in R ON,sp by 37.7% when compared with the theoretical R ON,sp of triple RESURF devices.</description><subject>breakdown voltage (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">V B)</subject><subject>Carrier mobility</subject><subject>Current carriers</subject><subject>Current measurement</subject><subject>Doping</subject><subject>Metal oxide semiconductors</subject><subject>normalized current-carrying capability</subject><subject>Optimization</subject><subject>semi-SJ LDMOS</subject><subject>sp</subject><subject>specific on-resistance (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">R ON</subject><subject>Substrates</subject><subject>Superjunction</subject><subject>Transistors</subject><subject>Voltage control</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kEtPwzAQhC0EEqVwR-JiiXOK7TiOc4S0PKSIHgpny03WyFVetRNE--txacVpNbvf7GoHoVtKZpSS7KFYzGeM0GzGMi5pJs_QhCaJjEgi4nM0ISmnUUyJuERX3m8IoZynfIK2y36wjd3rwXYt1m2FFz89ONtAO3jcGVzoAZyu8QoaG63GMNuMbflHz-HbloCftIcKB_3euUbXdh9UPjoXNkS5dm5n2y-c616vbW2H3TW6MLr2cHOqU_T5vPjIX6Ni-fKWPxZRyTI6RJWATCcUDKRGgGFc8DWYmK8lSyvg0hCe8dBKeIAkqYRhpSwZMMYJKUkaT9H9cW_vuu0IflCbbnRtOKlYzJhMOEt4oMiRKl3nvQOj-vC8djtFiToEq0Kw6hCsOgUbLHdHiwWAf1zKVAgax7_ab3W3</recordid><startdate>20191201</startdate><enddate>20191201</enddate><creator>Zhang, Wentong</creator><creator>Wang, Rui</creator><creator>Cheng, Shikang</creator><creator>Gu, SenYan</creator><creator>Zhang, Sen</creator><creator>He, Boyong</creator><creator>Qiao, Ming</creator><creator>Li, Zhaoji</creator><creator>Zhang, Bo</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0001-9221-3318</orcidid><orcidid>https://orcid.org/0000-0001-6325-9878</orcidid><orcidid>https://orcid.org/0000-0002-8119-5000</orcidid></search><sort><creationdate>20191201</creationdate><title>Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability</title><author>Zhang, Wentong ; Wang, Rui ; Cheng, Shikang ; Gu, SenYan ; Zhang, Sen ; He, Boyong ; Qiao, Ming ; Li, Zhaoji ; Zhang, Bo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-d6e9a51efe7f6ef2464bef34b827de48f04944be5451e80d6f2c8c2e22400c073</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>breakdown voltage (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">V B)</topic><topic>Carrier mobility</topic><topic>Current carriers</topic><topic>Current measurement</topic><topic>Doping</topic><topic>Metal oxide semiconductors</topic><topic>normalized current-carrying capability</topic><topic>Optimization</topic><topic>semi-SJ LDMOS</topic><topic>sp</topic><topic>specific on-resistance (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">R ON</topic><topic>Substrates</topic><topic>Superjunction</topic><topic>Transistors</topic><topic>Voltage control</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Zhang, Wentong</creatorcontrib><creatorcontrib>Wang, Rui</creatorcontrib><creatorcontrib>Cheng, Shikang</creatorcontrib><creatorcontrib>Gu, SenYan</creatorcontrib><creatorcontrib>Zhang, Sen</creatorcontrib><creatorcontrib>He, Boyong</creatorcontrib><creatorcontrib>Qiao, Ming</creatorcontrib><creatorcontrib>Li, Zhaoji</creatorcontrib><creatorcontrib>Zhang, Bo</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Zhang, Wentong</au><au>Wang, Rui</au><au>Cheng, Shikang</au><au>Gu, SenYan</au><au>Zhang, Sen</au><au>He, Boyong</au><au>Qiao, Ming</au><au>Li, Zhaoji</au><au>Zhang, Bo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2019-12-01</date><risdate>2019</risdate><volume>40</volume><issue>12</issue><spage>1969</spage><epage>1972</epage><pages>1969-1972</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the semi-SJ is introduced near the source. The semi-SJ increases the local doping concentration in the N regions meanwhile reduces the current path area and carrier mobility, resulting in the variation of CCs before and after the introduction of the semi-SJ. The normalized CC factor η C is proposed to evaluate this variation, with which the minimum specific on-resistance R ON,sp is predicted by the condition of η C = 1. The experiments of the semi-SJ LDMOS exhibit a minimum R ON,sp of 25.5 mΩ·cm 2 under a breakdown voltage V B of 464.3 V. This represents a reduction in R ON,sp by 37.7% when compared with the theoretical R ON,sp of triple RESURF devices.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2019.2948198</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0001-9221-3318</orcidid><orcidid>https://orcid.org/0000-0001-6325-9878</orcidid><orcidid>https://orcid.org/0000-0002-8119-5000</orcidid></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0741-3106 |
| ispartof | IEEE electron device letters, 2019-12, Vol.40 (12), p.1969-1972 |
| issn | 0741-3106 1558-0563 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_LED_2019_2948198 |
| source | IEEE Electronic Library (IEL) |
| subjects | breakdown voltage (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">V B) Carrier mobility Current carriers Current measurement Doping Metal oxide semiconductors normalized current-carrying capability Optimization semi-SJ LDMOS sp specific on-resistance (<italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">R ON Substrates Superjunction Transistors Voltage control |
| title | Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T03%3A15%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Optimization%20and%20Experiments%20of%20Lateral%20Semi-Superjunction%20Device%20Based%20on%20Normalized%20Current-Carrying%20Capability&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Zhang,%20Wentong&rft.date=2019-12-01&rft.volume=40&rft.issue=12&rft.spage=1969&rft.epage=1972&rft.pages=1969-1972&rft.issn=0741-3106&rft.eissn=1558-0563&rft.coden=EDLEDZ&rft_id=info:doi/10.1109/LED.2019.2948198&rft_dat=%3Cproquest_RIE%3E2322854254%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2322854254&rft_id=info:pmid/&rft_ieee_id=8876613&rfr_iscdi=true |