High Field Effect Mobility, Amorphous In-Ga-Sn-O Thin-Film Transistor With No Effect of Negative Bias Illumination Stress
We report a dual-gate, amorphous In-Ga-Sn-O (a- IGTO) thin-film transistor (TFT) exhibiting high field-effect mobility ( \mu _{\text {FE}} ) and very low subthreshold swing. The TFT has a bottom-gate having 5~ \mu \text{m} overlap with source/drain (S/D) and a top-gate with 0.5~\mu \text{m} offs...
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| Veröffentlicht in: | IEEE electron device letters 2019-09, Vol.40 (9), p.1443-1446 |
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| creator | Lee, Jiseob Kim, Dongjin Lee, Suhui Cho, Johann Park, Hyungryul Jang, Jin |
| description | We report a dual-gate, amorphous In-Ga-Sn-O (a- IGTO) thin-film transistor (TFT) exhibiting high field-effect mobility ( \mu _{\text {FE}} ) and very low subthreshold swing. The TFT has a bottom-gate having 5~ \mu \text{m} overlap with source/drain (S/D) and a top-gate with 0.5~\mu \text{m} offset with S/D electrodes. The bottom-gate potential is swept at various top-gate voltages. The \mu _{\text {FE}} of a-IGTO TFT is found to be 39.1 cm ^{\text {2}}\text{V}^{-\text {1}}\text{s}^{-\text {1}} which is almost independent of top-gate potential. The subthreshold swing is ~0.19 Vdec −1 and also does not change much with top-gate potential variation between −50 V and +90 V, indicating very low density of states in the gap. The a-IGTO TFT exhibits no effect of negative bias illumination stress. |
| doi_str_mv | 10.1109/LED.2019.2931089 |
| format | Article |
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The TFT has a bottom-gate having <inline-formula> <tex-math notation="LaTeX">5~ \mu \text{m} </tex-math></inline-formula> overlap with source/drain (S/D) and a top-gate with <inline-formula> <tex-math notation="LaTeX">0.5~\mu \text{m} </tex-math></inline-formula> offset with S/D electrodes. The bottom-gate potential is swept at various top-gate voltages. The <inline-formula> <tex-math notation="LaTeX"> \mu _{\text {FE}} </tex-math></inline-formula> of a-IGTO TFT is found to be 39.1 cm<inline-formula> <tex-math notation="LaTeX">^{\text {2}}\text{V}^{-\text {1}}\text{s}^{-\text {1}} </tex-math></inline-formula> which is almost independent of top-gate potential. The subthreshold swing is ~0.19 Vdec −1 and also does not change much with top-gate potential variation between −50 V and +90 V, indicating very low density of states in the gap. The a-IGTO TFT exhibits no effect of negative bias illumination stress.]]></description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2019.2931089</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>a-IGTO TFTs ; Bias ; Electric potential ; Electrodes ; Illumination ; Iron ; Lighting ; Logic gates ; mobility ; negative bias illumination stress (NBIS) ; Semiconductor devices ; Stress ; Thin film transistors ; Transistors</subject><ispartof>IEEE electron device letters, 2019-09, Vol.40 (9), p.1443-1446</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c221t-58af7ffc7f2bc529d8b9e80abe41518f7d73a554b964ee3c5a62b2afa8f273903</citedby><cites>FETCH-LOGICAL-c221t-58af7ffc7f2bc529d8b9e80abe41518f7d73a554b964ee3c5a62b2afa8f273903</cites><orcidid>0000-0003-1065-1299 ; 0000-0001-9200-0830 ; 0000-0002-7572-5669</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8772142$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27903,27904,54737</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8772142$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lee, Jiseob</creatorcontrib><creatorcontrib>Kim, Dongjin</creatorcontrib><creatorcontrib>Lee, Suhui</creatorcontrib><creatorcontrib>Cho, Johann</creatorcontrib><creatorcontrib>Park, Hyungryul</creatorcontrib><creatorcontrib>Jang, Jin</creatorcontrib><title>High Field Effect Mobility, Amorphous In-Ga-Sn-O Thin-Film Transistor With No Effect of Negative Bias Illumination Stress</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description><![CDATA[We report a dual-gate, amorphous In-Ga-Sn-O (a- IGTO) thin-film transistor (TFT) exhibiting high field-effect mobility (<inline-formula> <tex-math notation="LaTeX">\mu _{\text {FE}} </tex-math></inline-formula>) and very low subthreshold swing. The TFT has a bottom-gate having <inline-formula> <tex-math notation="LaTeX">5~ \mu \text{m} </tex-math></inline-formula> overlap with source/drain (S/D) and a top-gate with <inline-formula> <tex-math notation="LaTeX">0.5~\mu \text{m} </tex-math></inline-formula> offset with S/D electrodes. The bottom-gate potential is swept at various top-gate voltages. The <inline-formula> <tex-math notation="LaTeX"> \mu _{\text {FE}} </tex-math></inline-formula> of a-IGTO TFT is found to be 39.1 cm<inline-formula> <tex-math notation="LaTeX">^{\text {2}}\text{V}^{-\text {1}}\text{s}^{-\text {1}} </tex-math></inline-formula> which is almost independent of top-gate potential. The subthreshold swing is ~0.19 Vdec −1 and also does not change much with top-gate potential variation between −50 V and +90 V, indicating very low density of states in the gap. The a-IGTO TFT exhibits no effect of negative bias illumination stress.]]></description><subject>a-IGTO TFTs</subject><subject>Bias</subject><subject>Electric potential</subject><subject>Electrodes</subject><subject>Illumination</subject><subject>Iron</subject><subject>Lighting</subject><subject>Logic gates</subject><subject>mobility</subject><subject>negative bias illumination stress (NBIS)</subject><subject>Semiconductor devices</subject><subject>Stress</subject><subject>Thin film transistors</subject><subject>Transistors</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM9LwzAYhoMoOKd3wUvAq5lJ2jTJcc79grkdNvFY0i5ZM9pmJq2w_96OTU8ffN_zvh88ADwSPCAEy9fF-H1AMZEDKiOChbwCPcKYQJgl0TXoYR4T1B2SW3AXwh5jEsc87oHjzO4KOLG63MKxMTpv4IfLbGmb4wscVs4fCtcGOK_RVKF1jVZwU9gaTWxZwY1XdbChcR5-2aaAS_dX4Qxc6p1q7I-Gb1Z1-bJsK1t3G1fDdeN1CPfgxqgy6IfL7IPPyXgzmqHFajofDRcop5Q0iAlluDE5NzTLGZVbkUktsMp0TBgRhm95pBiLM5nEWkc5UwnNqDJKGMojiaM-eD73Hrz7bnVo0r1rfd29TCnlUlCcCNJR-Ezl3oXgtUkP3lbKH1OC05PgtBOcngSnF8Fd5OkcsVrrf1xwTklMo19di3aC</recordid><startdate>20190901</startdate><enddate>20190901</enddate><creator>Lee, Jiseob</creator><creator>Kim, Dongjin</creator><creator>Lee, Suhui</creator><creator>Cho, Johann</creator><creator>Park, Hyungryul</creator><creator>Jang, Jin</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0003-1065-1299</orcidid><orcidid>https://orcid.org/0000-0001-9200-0830</orcidid><orcidid>https://orcid.org/0000-0002-7572-5669</orcidid></search><sort><creationdate>20190901</creationdate><title>High Field Effect Mobility, Amorphous In-Ga-Sn-O Thin-Film Transistor With No Effect of Negative Bias Illumination Stress</title><author>Lee, Jiseob ; Kim, Dongjin ; Lee, Suhui ; Cho, Johann ; Park, Hyungryul ; Jang, Jin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c221t-58af7ffc7f2bc529d8b9e80abe41518f7d73a554b964ee3c5a62b2afa8f273903</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>a-IGTO TFTs</topic><topic>Bias</topic><topic>Electric potential</topic><topic>Electrodes</topic><topic>Illumination</topic><topic>Iron</topic><topic>Lighting</topic><topic>Logic gates</topic><topic>mobility</topic><topic>negative bias illumination stress (NBIS)</topic><topic>Semiconductor devices</topic><topic>Stress</topic><topic>Thin film transistors</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lee, Jiseob</creatorcontrib><creatorcontrib>Kim, Dongjin</creatorcontrib><creatorcontrib>Lee, Suhui</creatorcontrib><creatorcontrib>Cho, Johann</creatorcontrib><creatorcontrib>Park, Hyungryul</creatorcontrib><creatorcontrib>Jang, Jin</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, Jiseob</au><au>Kim, Dongjin</au><au>Lee, Suhui</au><au>Cho, Johann</au><au>Park, Hyungryul</au><au>Jang, Jin</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High Field Effect Mobility, Amorphous In-Ga-Sn-O Thin-Film Transistor With No Effect of Negative Bias Illumination Stress</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2019-09-01</date><risdate>2019</risdate><volume>40</volume><issue>9</issue><spage>1443</spage><epage>1446</epage><pages>1443-1446</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract><![CDATA[We report a dual-gate, amorphous In-Ga-Sn-O (a- IGTO) thin-film transistor (TFT) exhibiting high field-effect mobility (<inline-formula> <tex-math notation="LaTeX">\mu _{\text {FE}} </tex-math></inline-formula>) and very low subthreshold swing. The TFT has a bottom-gate having <inline-formula> <tex-math notation="LaTeX">5~ \mu \text{m} </tex-math></inline-formula> overlap with source/drain (S/D) and a top-gate with <inline-formula> <tex-math notation="LaTeX">0.5~\mu \text{m} </tex-math></inline-formula> offset with S/D electrodes. The bottom-gate potential is swept at various top-gate voltages. The <inline-formula> <tex-math notation="LaTeX"> \mu _{\text {FE}} </tex-math></inline-formula> of a-IGTO TFT is found to be 39.1 cm<inline-formula> <tex-math notation="LaTeX">^{\text {2}}\text{V}^{-\text {1}}\text{s}^{-\text {1}} </tex-math></inline-formula> which is almost independent of top-gate potential. The subthreshold swing is ~0.19 Vdec −1 and also does not change much with top-gate potential variation between −50 V and +90 V, indicating very low density of states in the gap. The a-IGTO TFT exhibits no effect of negative bias illumination stress.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2019.2931089</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0003-1065-1299</orcidid><orcidid>https://orcid.org/0000-0001-9200-0830</orcidid><orcidid>https://orcid.org/0000-0002-7572-5669</orcidid></addata></record> |
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| subjects | a-IGTO TFTs Bias Electric potential Electrodes Illumination Iron Lighting Logic gates mobility negative bias illumination stress (NBIS) Semiconductor devices Stress Thin film transistors Transistors |
| title | High Field Effect Mobility, Amorphous In-Ga-Sn-O Thin-Film Transistor With No Effect of Negative Bias Illumination Stress |
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