Attention-Enabled Memory for Concurrent Learning Adaptive Control

Transient tracking error dynamics are inevitable in any practical closed-loop control system. While numerous works are devoted to improving these dynamics, in this paper, we focus on taking advantage of it first, in the context of adaptive control. We propose a memory architecture that can make use...

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Veröffentlicht in:IEEE control systems letters 2023-01, Vol.7, p.1-1
Hauptverfasser: Habboush, Abdullah, Yildiz, Yildiray
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description Transient tracking error dynamics are inevitable in any practical closed-loop control system. While numerous works are devoted to improving these dynamics, in this paper, we focus on taking advantage of it first, in the context of adaptive control. We propose a memory architecture that can make use of stored significant data about the transients of previously experienced anomalies to aid in obtaining a resilient system against uncertainties. The proposed architecture consists of 1) a memory containing data about a variety of uncertainties, 2) a short-term memory that aids in handling new uncertainties, and 3) an attention-based reading mechanism that enables the controller to retrieve only relevant data from the memory. The effectiveness of the architecture is validated through numerical simulations, and a rigorous Lyapunov stability analysis is provided.
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fullrecord <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_LCSYS_2022_3229961</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9990585</ieee_id><sourcerecordid>10_1109_LCSYS_2022_3229961</sourcerecordid><originalsourceid>FETCH-LOGICAL-c311t-dd055b2ad7cbac47cbd195ae2fa9207d5c94266e4a3a35689d1e9bfceb15752e3</originalsourceid><addsrcrecordid>eNpNkMFKxDAQhoMouKz7AnrpC7Qmk6ZtjqWsulDxsHrwFNJkKpVusqRR2Le36y7iZf6Bme8_fITcMpoxRuV922zftxlQgIwDSFmwC7KAvBQpy0Vx-W-_Jqtp-qSUsgpKCnJB6jpGdHHwLl073Y1ok2fc-XBIeh-SxjvzFcL8kLSogxvcR1JbvY_DNx6PMfjxhlz1epxwdc4leXtYvzZPafvyuGnqNjWcsZhaS4XoQNvSdNrk87RMCo3Qawm0tMLIHIoCc801F0UlLUPZ9QY7JkoByJcETr0m-GkK2Kt9GHY6HBSj6uhB_XpQRw_q7GGG7k7QgIh_gJSSikrwH-B3Wo4</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Attention-Enabled Memory for Concurrent Learning Adaptive Control</title><source>IEEE Electronic Library (IEL)</source><creator>Habboush, Abdullah ; Yildiz, Yildiray</creator><creatorcontrib>Habboush, Abdullah ; Yildiz, Yildiray</creatorcontrib><description>Transient tracking error dynamics are inevitable in any practical closed-loop control system. While numerous works are devoted to improving these dynamics, in this paper, we focus on taking advantage of it first, in the context of adaptive control. We propose a memory architecture that can make use of stored significant data about the transients of previously experienced anomalies to aid in obtaining a resilient system against uncertainties. The proposed architecture consists of 1) a memory containing data about a variety of uncertainties, 2) a short-term memory that aids in handling new uncertainties, and 3) an attention-based reading mechanism that enables the controller to retrieve only relevant data from the memory. The effectiveness of the architecture is validated through numerical simulations, and a rigorous Lyapunov stability analysis is provided.</description><identifier>ISSN: 2475-1456</identifier><identifier>EISSN: 2475-1456</identifier><identifier>DOI: 10.1109/LCSYS.2022.3229961</identifier><identifier>CODEN: ICSLBO</identifier><language>eng</language><publisher>IEEE</publisher><subject>Adaptive control ; Estimation error ; History ; Memory architecture ; Tires ; Transient analysis ; Uncertain systems ; Uncertainty</subject><ispartof>IEEE control systems letters, 2023-01, Vol.7, p.1-1</ispartof><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c311t-dd055b2ad7cbac47cbd195ae2fa9207d5c94266e4a3a35689d1e9bfceb15752e3</citedby><cites>FETCH-LOGICAL-c311t-dd055b2ad7cbac47cbd195ae2fa9207d5c94266e4a3a35689d1e9bfceb15752e3</cites><orcidid>0000-0001-6270-5354 ; 0000-0001-8598-6419</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9990585$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9990585$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Habboush, Abdullah</creatorcontrib><creatorcontrib>Yildiz, Yildiray</creatorcontrib><title>Attention-Enabled Memory for Concurrent Learning Adaptive Control</title><title>IEEE control systems letters</title><addtitle>LCSYS</addtitle><description>Transient tracking error dynamics are inevitable in any practical closed-loop control system. While numerous works are devoted to improving these dynamics, in this paper, we focus on taking advantage of it first, in the context of adaptive control. We propose a memory architecture that can make use of stored significant data about the transients of previously experienced anomalies to aid in obtaining a resilient system against uncertainties. The proposed architecture consists of 1) a memory containing data about a variety of uncertainties, 2) a short-term memory that aids in handling new uncertainties, and 3) an attention-based reading mechanism that enables the controller to retrieve only relevant data from the memory. The effectiveness of the architecture is validated through numerical simulations, and a rigorous Lyapunov stability analysis is provided.</description><subject>Adaptive control</subject><subject>Estimation error</subject><subject>History</subject><subject>Memory architecture</subject><subject>Tires</subject><subject>Transient analysis</subject><subject>Uncertain systems</subject><subject>Uncertainty</subject><issn>2475-1456</issn><issn>2475-1456</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNkMFKxDAQhoMouKz7AnrpC7Qmk6ZtjqWsulDxsHrwFNJkKpVusqRR2Le36y7iZf6Bme8_fITcMpoxRuV922zftxlQgIwDSFmwC7KAvBQpy0Vx-W-_Jqtp-qSUsgpKCnJB6jpGdHHwLl073Y1ok2fc-XBIeh-SxjvzFcL8kLSogxvcR1JbvY_DNx6PMfjxhlz1epxwdc4leXtYvzZPafvyuGnqNjWcsZhaS4XoQNvSdNrk87RMCo3Qawm0tMLIHIoCc801F0UlLUPZ9QY7JkoByJcETr0m-GkK2Kt9GHY6HBSj6uhB_XpQRw_q7GGG7k7QgIh_gJSSikrwH-B3Wo4</recordid><startdate>20230101</startdate><enddate>20230101</enddate><creator>Habboush, Abdullah</creator><creator>Yildiz, Yildiray</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><orcidid>https://orcid.org/0000-0001-6270-5354</orcidid><orcidid>https://orcid.org/0000-0001-8598-6419</orcidid></search><sort><creationdate>20230101</creationdate><title>Attention-Enabled Memory for Concurrent Learning Adaptive Control</title><author>Habboush, Abdullah ; Yildiz, Yildiray</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c311t-dd055b2ad7cbac47cbd195ae2fa9207d5c94266e4a3a35689d1e9bfceb15752e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Adaptive control</topic><topic>Estimation error</topic><topic>History</topic><topic>Memory architecture</topic><topic>Tires</topic><topic>Transient analysis</topic><topic>Uncertain systems</topic><topic>Uncertainty</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Habboush, Abdullah</creatorcontrib><creatorcontrib>Yildiz, Yildiray</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE control systems letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Habboush, Abdullah</au><au>Yildiz, Yildiray</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Attention-Enabled Memory for Concurrent Learning Adaptive Control</atitle><jtitle>IEEE control systems letters</jtitle><stitle>LCSYS</stitle><date>2023-01-01</date><risdate>2023</risdate><volume>7</volume><spage>1</spage><epage>1</epage><pages>1-1</pages><issn>2475-1456</issn><eissn>2475-1456</eissn><coden>ICSLBO</coden><abstract>Transient tracking error dynamics are inevitable in any practical closed-loop control system. While numerous works are devoted to improving these dynamics, in this paper, we focus on taking advantage of it first, in the context of adaptive control. We propose a memory architecture that can make use of stored significant data about the transients of previously experienced anomalies to aid in obtaining a resilient system against uncertainties. The proposed architecture consists of 1) a memory containing data about a variety of uncertainties, 2) a short-term memory that aids in handling new uncertainties, and 3) an attention-based reading mechanism that enables the controller to retrieve only relevant data from the memory. The effectiveness of the architecture is validated through numerical simulations, and a rigorous Lyapunov stability analysis is provided.</abstract><pub>IEEE</pub><doi>10.1109/LCSYS.2022.3229961</doi><tpages>1</tpages><orcidid>https://orcid.org/0000-0001-6270-5354</orcidid><orcidid>https://orcid.org/0000-0001-8598-6419</orcidid><oa>free_for_read</oa></addata></record>
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subjects Adaptive control
Estimation error
History
Memory architecture
Tires
Transient analysis
Uncertain systems
Uncertainty
title Attention-Enabled Memory for Concurrent Learning Adaptive Control
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T06%3A48%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Attention-Enabled%20Memory%20for%20Concurrent%20Learning%20Adaptive%20Control&rft.jtitle=IEEE%20control%20systems%20letters&rft.au=Habboush,%20Abdullah&rft.date=2023-01-01&rft.volume=7&rft.spage=1&rft.epage=1&rft.pages=1-1&rft.issn=2475-1456&rft.eissn=2475-1456&rft.coden=ICSLBO&rft_id=info:doi/10.1109/LCSYS.2022.3229961&rft_dat=%3Ccrossref_RIE%3E10_1109_LCSYS_2022_3229961%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9990585&rfr_iscdi=true