Implementation of Boolean Functions Using Tunnel Field-Effect Transistors
Tunnel field-effect transistors (TFETs) are being examined as a possible replacement of MOSFETs for digital applications. However, TFETs have small ON-state current and, typically, exhibit reduced speed compared with conventional MOSFETs. Nevertheless, TFETs have some distinct characteristics that c...
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Veröffentlicht in: | IEEE journal on exploratory solid-state computational devices and circuits 2020-12, Vol.6 (2), p.146-154 |
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description | Tunnel field-effect transistors (TFETs) are being examined as a possible replacement of MOSFETs for digital applications. However, TFETs have small ON-state current and, typically, exhibit reduced speed compared with conventional MOSFETs. Nevertheless, TFETs have some distinct characteristics that can be exploited for digital applications. In this article, using simulations, we show that a single device, in which two terminals are biased independently, can realize all primary two-input Boolean functions, such as AND, OR, NAND, NOR, XOR, and XNOR. By modifying the architecture of double-gate TFET (DGTFET) slightly and appropriately choosing device parameters, the Boolean functions AND, OR, NAND, NOR, and XNOR can be implemented. In addition, we propose a twin double-gate (TDG) TFET architecture, which can implement the inhibition functions A'B and AB' . By suitably combining the inhibition functions, an XOR functionality can be obtained in a single device. These implementations demonstrate that the unique characteristics of TFET, such as ambipolar conduction and dependence of tunneling on the gate-source/drain overlaps, can be exploited to realize logic functions compactly. |
doi_str_mv | 10.1109/JXCDC.2020.3038073 |
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However, TFETs have small ON-state current and, typically, exhibit reduced speed compared with conventional MOSFETs. Nevertheless, TFETs have some distinct characteristics that can be exploited for digital applications. In this article, using simulations, we show that a single device, in which two terminals are biased independently, can realize all primary two-input Boolean functions, such as AND, OR, NAND, NOR, XOR, and XNOR. By modifying the architecture of double-gate TFET (DGTFET) slightly and appropriately choosing device parameters, the Boolean functions AND, OR, NAND, NOR, and XNOR can be implemented. In addition, we propose a twin double-gate (TDG) TFET architecture, which can implement the inhibition functions <inline-formula> <tex-math notation="LaTeX">A'B </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">AB' </tex-math></inline-formula>. By suitably combining the inhibition functions, an XOR functionality can be obtained in a single device. These implementations demonstrate that the unique characteristics of TFET, such as ambipolar conduction and dependence of tunneling on the gate-source/drain overlaps, can be exploited to realize logic functions compactly.]]></description><identifier>ISSN: 2329-9231</identifier><identifier>EISSN: 2329-9231</identifier><identifier>DOI: 10.1109/JXCDC.2020.3038073</identifier><identifier>CODEN: IJESQ5</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject>Boolean ; Boolean algebra ; Boolean functions ; Double-gate FETs ; Double-gate tunnel field-effect transistor (FET) ; Field effect transistors ; independent gate control ; Integrated circuit modeling ; Logic functions ; Logic gates ; MOSFET ; MOSFETs ; on-state current to off-state current ratio ; Semiconductor devices ; TFETs ; Transistors ; Tunneling ; twin double-gate (TDG) structure ; two-variable Boolean functions</subject><ispartof>IEEE journal on exploratory solid-state computational devices and circuits, 2020-12, Vol.6 (2), p.146-154</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2020</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c405t-9ea9e5eccf88df06e820285c78f6dc01392abb75bdae8855a7f3d41d855039843</citedby><cites>FETCH-LOGICAL-c405t-9ea9e5eccf88df06e820285c78f6dc01392abb75bdae8855a7f3d41d855039843</cites><orcidid>0000-0002-6807-7544 ; 0000-0002-0587-3391</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9259029$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,860,2096,27610,27901,27902,54908</link.rule.ids></links><search><creatorcontrib>Garg, S.</creatorcontrib><creatorcontrib>Saurabh, Sneh</creatorcontrib><title>Implementation of Boolean Functions Using Tunnel Field-Effect Transistors</title><title>IEEE journal on exploratory solid-state computational devices and circuits</title><addtitle>JXCDC</addtitle><description><![CDATA[Tunnel field-effect transistors (TFETs) are being examined as a possible replacement of MOSFETs for digital applications. However, TFETs have small ON-state current and, typically, exhibit reduced speed compared with conventional MOSFETs. Nevertheless, TFETs have some distinct characteristics that can be exploited for digital applications. In this article, using simulations, we show that a single device, in which two terminals are biased independently, can realize all primary two-input Boolean functions, such as AND, OR, NAND, NOR, XOR, and XNOR. By modifying the architecture of double-gate TFET (DGTFET) slightly and appropriately choosing device parameters, the Boolean functions AND, OR, NAND, NOR, and XNOR can be implemented. In addition, we propose a twin double-gate (TDG) TFET architecture, which can implement the inhibition functions <inline-formula> <tex-math notation="LaTeX">A'B </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">AB' </tex-math></inline-formula>. By suitably combining the inhibition functions, an XOR functionality can be obtained in a single device. These implementations demonstrate that the unique characteristics of TFET, such as ambipolar conduction and dependence of tunneling on the gate-source/drain overlaps, can be exploited to realize logic functions compactly.]]></description><subject>Boolean</subject><subject>Boolean algebra</subject><subject>Boolean functions</subject><subject>Double-gate FETs</subject><subject>Double-gate tunnel field-effect transistor (FET)</subject><subject>Field effect transistors</subject><subject>independent gate control</subject><subject>Integrated circuit modeling</subject><subject>Logic functions</subject><subject>Logic gates</subject><subject>MOSFET</subject><subject>MOSFETs</subject><subject>on-state current to off-state current ratio</subject><subject>Semiconductor devices</subject><subject>TFETs</subject><subject>Transistors</subject><subject>Tunneling</subject><subject>twin double-gate (TDG) structure</subject><subject>two-variable Boolean functions</subject><issn>2329-9231</issn><issn>2329-9231</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><sourceid>DOA</sourceid><recordid>eNpNUU1LAzEUXETBov0DelnwvPUl2ewmR62tVgpeWvAW0uSlbNkmNdke_PduPyie3vCYmTe8ybIHAiNCQD5_fo_fxiMKFEYMmICaXWUDyqgsJGXk-h--zYYpbQCA8LqsaznIZrPtrsUt-k53TfB5cPlrCC1qn0_33hx2KV-mxq_zxd57bPNpg60tJs6h6fJF1D41qQsx3Wc3TrcJh-d5ly2nk8X4o5h_vc_GL_PClMC7QqKWyNEYJ4R1UKHogwtuauEqa4AwSfVqVfOV1SgE57p2zJbE9hCYFCW7y2YnXxv0Ru1is9XxVwXdqOMixLXSsWtMi4qDBSNKqAipSsPMSkgubP8hrmlVW9t7PZ28djH87DF1ahP20ffxFS1FxSUjUvYsemKZGFKK6C5XCahDA-rYgDo0oM4N9KLHk6hBxItAUi6BSvYHYiaAlg</recordid><startdate>20201201</startdate><enddate>20201201</enddate><creator>Garg, S.</creator><creator>Saurabh, Sneh</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>DOA</scope><orcidid>https://orcid.org/0000-0002-6807-7544</orcidid><orcidid>https://orcid.org/0000-0002-0587-3391</orcidid></search><sort><creationdate>20201201</creationdate><title>Implementation of Boolean Functions Using Tunnel Field-Effect Transistors</title><author>Garg, S. ; Saurabh, Sneh</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c405t-9ea9e5eccf88df06e820285c78f6dc01392abb75bdae8855a7f3d41d855039843</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Boolean</topic><topic>Boolean algebra</topic><topic>Boolean functions</topic><topic>Double-gate FETs</topic><topic>Double-gate tunnel field-effect transistor (FET)</topic><topic>Field effect transistors</topic><topic>independent gate control</topic><topic>Integrated circuit modeling</topic><topic>Logic functions</topic><topic>Logic gates</topic><topic>MOSFET</topic><topic>MOSFETs</topic><topic>on-state current to off-state current ratio</topic><topic>Semiconductor devices</topic><topic>TFETs</topic><topic>Transistors</topic><topic>Tunneling</topic><topic>twin double-gate (TDG) structure</topic><topic>two-variable Boolean functions</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Garg, S.</creatorcontrib><creatorcontrib>Saurabh, Sneh</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>DOAJ Directory of Open Access Journals</collection><jtitle>IEEE journal on exploratory solid-state computational devices and circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Garg, S.</au><au>Saurabh, Sneh</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Implementation of Boolean Functions Using Tunnel Field-Effect Transistors</atitle><jtitle>IEEE journal on exploratory solid-state computational devices and circuits</jtitle><stitle>JXCDC</stitle><date>2020-12-01</date><risdate>2020</risdate><volume>6</volume><issue>2</issue><spage>146</spage><epage>154</epage><pages>146-154</pages><issn>2329-9231</issn><eissn>2329-9231</eissn><coden>IJESQ5</coden><abstract><![CDATA[Tunnel field-effect transistors (TFETs) are being examined as a possible replacement of MOSFETs for digital applications. However, TFETs have small ON-state current and, typically, exhibit reduced speed compared with conventional MOSFETs. Nevertheless, TFETs have some distinct characteristics that can be exploited for digital applications. In this article, using simulations, we show that a single device, in which two terminals are biased independently, can realize all primary two-input Boolean functions, such as AND, OR, NAND, NOR, XOR, and XNOR. By modifying the architecture of double-gate TFET (DGTFET) slightly and appropriately choosing device parameters, the Boolean functions AND, OR, NAND, NOR, and XNOR can be implemented. In addition, we propose a twin double-gate (TDG) TFET architecture, which can implement the inhibition functions <inline-formula> <tex-math notation="LaTeX">A'B </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">AB' </tex-math></inline-formula>. By suitably combining the inhibition functions, an XOR functionality can be obtained in a single device. These implementations demonstrate that the unique characteristics of TFET, such as ambipolar conduction and dependence of tunneling on the gate-source/drain overlaps, can be exploited to realize logic functions compactly.]]></abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/JXCDC.2020.3038073</doi><tpages>9</tpages><orcidid>https://orcid.org/0000-0002-6807-7544</orcidid><orcidid>https://orcid.org/0000-0002-0587-3391</orcidid><oa>free_for_read</oa></addata></record> |
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subjects | Boolean Boolean algebra Boolean functions Double-gate FETs Double-gate tunnel field-effect transistor (FET) Field effect transistors independent gate control Integrated circuit modeling Logic functions Logic gates MOSFET MOSFETs on-state current to off-state current ratio Semiconductor devices TFETs Transistors Tunneling twin double-gate (TDG) structure two-variable Boolean functions |
title | Implementation of Boolean Functions Using Tunnel Field-Effect Transistors |
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