A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS

This article presents a novel method for frequency tracking based on an extended bang-bang phase detector (XBBPD) in a referenceless clock and data recovery (CDR) circuit. The XBBPD-based structure has a frequency tracking range that completely covers the tuning range of the digitally controlled osc...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2020-10, Vol.55 (10), p.2831-2841
Hauptverfasser:	Yu, Changzhi, Sa, Euije, Jin, Soowan, Park, Himchan, Shin, Jongshin, Burm, Jinwook
Format:	Artikel
Sprache:	eng
Schlagworte:	Circuits Clock recovery Clocks CMOS Data recovery Detectors Digital filters Digital loop filter digitally controlled oscillator (DCO) extended bang-bang phase detector (XBBPD) Frequency locking half-rate sampling high-speed integrated circuits Oscillators Phase detectors Phase frequency detector Power consumption Receivers referenceless clock and data recovery (CDR) Time-frequency analysis Timing Tracking Vibration
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