Analysis and Design of a 20-MHz Bandwidth, 50.5-dBm OOB-IIP3, and 5.4-mW TIA for SAW-Less Receivers

A power-efficient transimpedance amplifier with wide channel bandwidth is proposed to meet the stringent linearity requirements of surface acoustic wave-less frequency-division duplexing receivers. A unity-gain loop bandwidth of 1.6 GHz is achieved with low-power dissipation. This was done without u...

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Veröffentlicht in:IEEE journal of solid-state circuits 2018-05, Vol.53 (5), p.1468-1480
Hauptverfasser: Pini, Giacomo, Manstretta, Danilo, Castello, Rinaldo
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container_title IEEE journal of solid-state circuits
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creator Pini, Giacomo
Manstretta, Danilo
Castello, Rinaldo
description A power-efficient transimpedance amplifier with wide channel bandwidth is proposed to meet the stringent linearity requirements of surface acoustic wave-less frequency-division duplexing receivers. A unity-gain loop bandwidth of 1.6 GHz is achieved with low-power dissipation. This was done without using any internal compensation but relying on zeros, both within the operational transconductance amplifier and in the feedback network, to ensure stability across all parameter variations. A simple non-linear analysis methodology is presented that provides important insights, useful for the design optimization. The prototype, implemented in 28-nm CMOS technology, has 14 dB of gain with 20-MHz bandwidth and achieves 21.1- \mu \text{V} in-band noise together with 33 and 50.5-dBm IIP3 at 6 and 100-MHz offset, respectively, while requiring only 5.4 mW. The corresponding filter figure of merit (FOM) of 183.2 dBJ −1 at 100-MHz offset exceeds that of all previous designs. Simulation shows that an even better FOM could be achieved using a larger width (more linear) feedback resistor. Finally, the differential input impedance is less than 33 \Omega at all frequencies.
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A unity-gain loop bandwidth of 1.6 GHz is achieved with low-power dissipation. This was done without using any internal compensation but relying on zeros, both within the operational transconductance amplifier and in the feedback network, to ensure stability across all parameter variations. A simple non-linear analysis methodology is presented that provides important insights, useful for the design optimization. The prototype, implemented in 28-nm CMOS technology, has 14 dB of gain with 20-MHz bandwidth and achieves 21.1-<inline-formula> <tex-math notation="LaTeX">\mu \text{V} </tex-math></inline-formula> in-band noise together with 33 and 50.5-dBm IIP3 at 6 and 100-MHz offset, respectively, while requiring only 5.4 mW. The corresponding filter figure of merit (FOM) of 183.2 dBJ −1 at 100-MHz offset exceeds that of all previous designs. Simulation shows that an even better FOM could be achieved using a larger width (more linear) feedback resistor. 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source IEEE Electronic Library (IEL)
subjects Acoustic noise
Amplifiers
Bandwidth
Bandwidths
Baseband
Capacitance
Capacitors
CMOS
Design optimization
Feedback
Figure of merit
frequency-division duplexing (FDD)
high linearity
Impedance
Input impedance
Linear analysis
Linearity
low power
mobile receivers
Nonlinear analysis
Receivers
Stability analysis
surface acoustic wave (SAW)-less
Surface acoustic waves
Transconductance
transimpedance amplifier (TIA)
title Analysis and Design of a 20-MHz Bandwidth, 50.5-dBm OOB-IIP3, and 5.4-mW TIA for SAW-Less Receivers
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