A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS
A 60-GHz band 2 × 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is implemented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconv...
Gespeichert in:
| Veröffentlicht in: | IEEE journal of solid-state circuits 2010-12, Vol.45 (12), p.2682-2695 |
|---|---|
| Hauptverfasser: | , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 2695 |
|---|---|
| container_issue | 12 |
| container_start_page | 2682 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 45 |
| creator | Chan, Wei L Long, John R |
| description | A 60-GHz band 2 × 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is implemented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconversion mixer suppresses flicker noise, and dynamic LO biasing suppresses carrier feedthrough. The 2.9 × 1.4 mm 2 chip consumes a total of 590 mW from a 1-V supply when driving all four channels at a maximum saturated output power of 11 dBm, with 20 dB gain per transmitter. Carrier leakage varies between - 20.5 dBc ±0.5 dB and sideband rejection is 25 to 28 dBc among the four transmitters when measured on the same die. The measured phase noise is 1.7 ± 1 dB higher than the theoretical 21.6 dB increase in the phase noise due to 12 X frequency multiplication of the injected LO. Maximum power-added efficiency of the transmit amplifier is greater than 16%, and gain is above 17 dB from 54 to 61 GHz. |
| doi_str_mv | 10.1109/JSSC.2010.2077170 |
| format | Article |
| fullrecord | <record><control><sourceid>crossref_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_JSSC_2010_2077170</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>5624588</ieee_id><sourcerecordid>10_1109_JSSC_2010_2077170</sourcerecordid><originalsourceid>FETCH-LOGICAL-c1108-ef686cbb7aa5a6f3322b4a37da617c5f4895dc03d4bd96229983ccfaeadbcca83</originalsourceid><addsrcrecordid>eNo9kM1Kw0AcxBdRMFYfQLzsA3TrfmQ_ckyDtkqlQip4CIR_djcYMVF2e6lPb0KLp2FgZhh-CN0yumCMZvfPZVksOB0tp1ozTc9QwqQ0hGnxfo4SSpkhGaf0El3F-DnaNDUsQcscK0pW61-8hMFhjqt5te96H6s5x68fEL0jeQhwwLsAQ-y7_d4H3A1YSTL0uHjZltfoooWv6G9OOkNvjw-7Yk0229VTkW-IHR8a4ltllG0aDSBBtUJw3qQgtAPFtJVtajLpLBUubVymOM8yI6xtwYNrrAUjZogdd234jjH4tv4JXQ_hUDNaTxDqCUI9QahPEMbO3bHTee__81LxVBoj_gBY8VXn</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS</title><source>IEEE Electronic Library (IEL)</source><creator>Chan, Wei L ; Long, John R</creator><creatorcontrib>Chan, Wei L ; Long, John R</creatorcontrib><description>A 60-GHz band 2 × 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is implemented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconversion mixer suppresses flicker noise, and dynamic LO biasing suppresses carrier feedthrough. The 2.9 × 1.4 mm 2 chip consumes a total of 590 mW from a 1-V supply when driving all four channels at a maximum saturated output power of 11 dBm, with 20 dB gain per transmitter. Carrier leakage varies between - 20.5 dBc ±0.5 dB and sideband rejection is 25 to 28 dBc among the four transmitters when measured on the same die. The measured phase noise is 1.7 ± 1 dB higher than the theoretical 21.6 dB increase in the phase noise due to 12 X frequency multiplication of the injected LO. Maximum power-added efficiency of the transmit amplifier is greater than 16%, and gain is above 17 dB from 54 to 61 GHz.</description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/JSSC.2010.2077170</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>IEEE</publisher><subject>Active inductor ; Active inductors ; carrier feedthrough ; CMOS ; CMOS technology ; frequency multiplier ; I/Q generator ; low voltage ; millimeter wave ; Millimeter wave technology ; phase shifter ; Phase shifters ; phased array ; power amplifier ; Power amplifiers ; sideband suppression ; transformer coupling ; Transistors ; transmitter ; Transmitters ; tripler</subject><ispartof>IEEE journal of solid-state circuits, 2010-12, Vol.45 (12), p.2682-2695</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c1108-ef686cbb7aa5a6f3322b4a37da617c5f4895dc03d4bd96229983ccfaeadbcca83</citedby><cites>FETCH-LOGICAL-c1108-ef686cbb7aa5a6f3322b4a37da617c5f4895dc03d4bd96229983ccfaeadbcca83</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5624588$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5624588$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chan, Wei L</creatorcontrib><creatorcontrib>Long, John R</creatorcontrib><title>A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS</title><title>IEEE journal of solid-state circuits</title><addtitle>JSSC</addtitle><description>A 60-GHz band 2 × 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is implemented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconversion mixer suppresses flicker noise, and dynamic LO biasing suppresses carrier feedthrough. The 2.9 × 1.4 mm 2 chip consumes a total of 590 mW from a 1-V supply when driving all four channels at a maximum saturated output power of 11 dBm, with 20 dB gain per transmitter. Carrier leakage varies between - 20.5 dBc ±0.5 dB and sideband rejection is 25 to 28 dBc among the four transmitters when measured on the same die. The measured phase noise is 1.7 ± 1 dB higher than the theoretical 21.6 dB increase in the phase noise due to 12 X frequency multiplication of the injected LO. Maximum power-added efficiency of the transmit amplifier is greater than 16%, and gain is above 17 dB from 54 to 61 GHz.</description><subject>Active inductor</subject><subject>Active inductors</subject><subject>carrier feedthrough</subject><subject>CMOS</subject><subject>CMOS technology</subject><subject>frequency multiplier</subject><subject>I/Q generator</subject><subject>low voltage</subject><subject>millimeter wave</subject><subject>Millimeter wave technology</subject><subject>phase shifter</subject><subject>Phase shifters</subject><subject>phased array</subject><subject>power amplifier</subject><subject>Power amplifiers</subject><subject>sideband suppression</subject><subject>transformer coupling</subject><subject>Transistors</subject><subject>transmitter</subject><subject>Transmitters</subject><subject>tripler</subject><issn>0018-9200</issn><issn>1558-173X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM1Kw0AcxBdRMFYfQLzsA3TrfmQ_ckyDtkqlQip4CIR_djcYMVF2e6lPb0KLp2FgZhh-CN0yumCMZvfPZVksOB0tp1ozTc9QwqQ0hGnxfo4SSpkhGaf0El3F-DnaNDUsQcscK0pW61-8hMFhjqt5te96H6s5x68fEL0jeQhwwLsAQ-y7_d4H3A1YSTL0uHjZltfoooWv6G9OOkNvjw-7Yk0229VTkW-IHR8a4ltllG0aDSBBtUJw3qQgtAPFtJVtajLpLBUubVymOM8yI6xtwYNrrAUjZogdd234jjH4tv4JXQ_hUDNaTxDqCUI9QahPEMbO3bHTee__81LxVBoj_gBY8VXn</recordid><startdate>201012</startdate><enddate>201012</enddate><creator>Chan, Wei L</creator><creator>Long, John R</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201012</creationdate><title>A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS</title><author>Chan, Wei L ; Long, John R</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1108-ef686cbb7aa5a6f3322b4a37da617c5f4895dc03d4bd96229983ccfaeadbcca83</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Active inductor</topic><topic>Active inductors</topic><topic>carrier feedthrough</topic><topic>CMOS</topic><topic>CMOS technology</topic><topic>frequency multiplier</topic><topic>I/Q generator</topic><topic>low voltage</topic><topic>millimeter wave</topic><topic>Millimeter wave technology</topic><topic>phase shifter</topic><topic>Phase shifters</topic><topic>phased array</topic><topic>power amplifier</topic><topic>Power amplifiers</topic><topic>sideband suppression</topic><topic>transformer coupling</topic><topic>Transistors</topic><topic>transmitter</topic><topic>Transmitters</topic><topic>tripler</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chan, Wei L</creatorcontrib><creatorcontrib>Long, John R</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chan, Wei L</au><au>Long, John R</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2010-12</date><risdate>2010</risdate><volume>45</volume><issue>12</issue><spage>2682</spage><epage>2695</epage><pages>2682-2695</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A 60-GHz band 2 × 2 phased-array transmitter implemented in 65-nm bulk CMOS is described. Two-dimensional beam steering in the azimuthal and elevation planes is implemented via LO phase shifting in a transmitter that also supports direct or IF up-conversion. Full current bleeding in the final upconversion mixer suppresses flicker noise, and dynamic LO biasing suppresses carrier feedthrough. The 2.9 × 1.4 mm 2 chip consumes a total of 590 mW from a 1-V supply when driving all four channels at a maximum saturated output power of 11 dBm, with 20 dB gain per transmitter. Carrier leakage varies between - 20.5 dBc ±0.5 dB and sideband rejection is 25 to 28 dBc among the four transmitters when measured on the same die. The measured phase noise is 1.7 ± 1 dB higher than the theoretical 21.6 dB increase in the phase noise due to 12 X frequency multiplication of the injected LO. Maximum power-added efficiency of the transmit amplifier is greater than 16%, and gain is above 17 dB from 54 to 61 GHz.</abstract><pub>IEEE</pub><doi>10.1109/JSSC.2010.2077170</doi><tpages>14</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 2010-12, Vol.45 (12), p.2682-2695 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_JSSC_2010_2077170 |
| source | IEEE Electronic Library (IEL) |
| subjects | Active inductor Active inductors carrier feedthrough CMOS CMOS technology frequency multiplier I/Q generator low voltage millimeter wave Millimeter wave technology phase shifter Phase shifters phased array power amplifier Power amplifiers sideband suppression transformer coupling Transistors transmitter Transmitters tripler |
| title | A 60-GHz Band 2 \,\times\,2 Phased-Array Transmitter in 65-nm CMOS |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T15%3A00%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-crossref_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%2060-GHz%20Band%202%20%5C,%5Ctimes%5C,2%20Phased-Array%20Transmitter%20in%2065-nm%20CMOS&rft.jtitle=IEEE%20journal%20of%20solid-state%20circuits&rft.au=Chan,%20Wei%20L&rft.date=2010-12&rft.volume=45&rft.issue=12&rft.spage=2682&rft.epage=2695&rft.pages=2682-2695&rft.issn=0018-9200&rft.eissn=1558-173X&rft.coden=IJSCBC&rft_id=info:doi/10.1109/JSSC.2010.2077170&rft_dat=%3Ccrossref_RIE%3E10_1109_JSSC_2010_2077170%3C/crossref_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=5624588&rfr_iscdi=true |