Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies
A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. Duri...
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Veröffentlicht in: | IEEE journal of solid-state circuits 2006-12, Vol.41 (12), p.2658-2668 |
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container_title | IEEE journal of solid-state circuits |
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creator | Fiorenza, J.K. Sepke, T. Holloway, P. Sodini, C.G. Hae-Seung Lee |
description | A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. It achieves an ENOB of 8.6 bits for a 3.8-MHz input signal and dissipates 2.5 mW |
doi_str_mv | 10.1109/JSSC.2006.884330 |
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The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. 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The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. It achieves an ENOB of 8.6 bits for a 3.8-MHz input signal and dissipates 2.5 mW</description><subject>A/D</subject><subject>ADC</subject><subject>Amplifiers</subject><subject>Analog circuits</subject><subject>analog-to-digital conversion</subject><subject>Applied sciences</subject><subject>CBSC</subject><subject>Charge transfer</subject><subject>Circuit properties</subject><subject>Circuits</subject><subject>CMOS</subject><subject>CMOS analog integrated circuits</subject><subject>CMOS technology</subject><subject>comparator-based switched-capacitor circuits</subject><subject>Comparators</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Dielectric, amorphous and glass solid devices</subject><subject>Dissipation</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Energy consumption</subject><subject>Exact sciences and technology</subject><subject>Grounds</subject><subject>Integrated circuits</subject><subject>Operational amplifiers</subject><subject>pipeline</subject><subject>Pipelines</subject><subject>Prototypes</subject><subject>scaled CMOS</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Solid state devices</topic><topic>Signal convertors</topic><topic>Switched capacitor circuits</topic><topic>Switching circuits</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Fiorenza, J.K.</creatorcontrib><creatorcontrib>Sepke, T.</creatorcontrib><creatorcontrib>Holloway, P.</creatorcontrib><creatorcontrib>Sodini, C.G.</creatorcontrib><creatorcontrib>Hae-Seung Lee</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Fiorenza, J.K.</au><au>Sepke, T.</au><au>Holloway, P.</au><au>Sodini, C.G.</au><au>Hae-Seung Lee</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>2006-12-01</date><risdate>2006</risdate><volume>41</volume><issue>12</issue><spage>2658</spage><epage>2668</epage><pages>2658-2668</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A comparator-based switched-capacitor circuit (CBSC) technique is presented for the design of analog and mixed-signal circuits in scaled CMOS technologies. The technique involves replacing the operational amplifier in a standard switched-capacitor circuit with a comparator and a current source. During charge transfer, the comparator detects the virtual ground condition in place of the opamp which normally forces the virtual ground condition. A prototype 1.5-bit/stage 10-bit 7.9-MS/s pipeline ADC was designed using the comparator-based switched-capacitor technique. The prototype ADC was implemented in 0.18-mum CMOS. It achieves an ENOB of 8.6 bits for a 3.8-MHz input signal and dissipates 2.5 mW</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/JSSC.2006.884330</doi><tpages>11</tpages></addata></record> |
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subjects | A/D ADC Amplifiers Analog circuits analog-to-digital conversion Applied sciences CBSC Charge transfer Circuit properties Circuits CMOS CMOS analog integrated circuits CMOS technology comparator-based switched-capacitor circuits Comparators Design. Technologies. Operation analysis. Testing Dielectric, amorphous and glass solid devices Dissipation Electric, optical and optoelectronic circuits Electronic circuits Electronics Energy consumption Exact sciences and technology Grounds Integrated circuits Operational amplifiers pipeline Pipelines Prototypes scaled CMOS Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal convertors Switched capacitor circuits Switching circuits |
title | Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies |
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