A GaAs 8×8-bit multiplier/accumulator using JFET/DCFL

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Veröffentlicht in:IEEE journal of solid-state circuits 1986-08, Vol.21 (4), p.523-529
Hauptverfasser: GONOI, K, HONBORI, I, WADA, M, TOGASHI, K, KATO, Y
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container_end_page 529
container_issue 4
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container_title IEEE journal of solid-state circuits
container_volume 21
creator GONOI, K
HONBORI, I
WADA, M
TOGASHI, K
KATO, Y
description
doi_str_mv 10.1109/JSSC.1986.1052566
format Article
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ispartof IEEE journal of solid-state circuits, 1986-08, Vol.21 (4), p.523-529
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source IEEE Electronic Library (IEL)
subjects Applied sciences
Electric, optical and optoelectronic circuits
Electronics
Exact sciences and technology
Theoretical study. Circuits analysis and design
title A GaAs 8×8-bit multiplier/accumulator using JFET/DCFL
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