A Reconfigurable SRAM Based CMOS PUF With Challenge to Response Pairs

This paper presents a reconfigurable SRAM-based physically unclonable function (PUF) topology with multiple challenge-response pairs (CRPs) per cell. The proposed PUF structure enables a very large CRP space by connecting additional pull-up and pull-down paths to each SRAM cell. These alternate path...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Veröffentlicht in:	IEEE access 2021, Vol.9, p.79947-79960
Hauptverfasser:	Baek, Seungbum, Yu, Guk-Hyeon, Kim, Jaewoo, Ngo, Chi Trung, Eshraghian, Jason K., Hong, Jong-Phil
Format:	Artikel
Sprache:	eng
Schlagworte:	authentication Bit error rate CMOS Computer architecture Energy efficiency Error detection Internet of Things Inverters Linear feedback shift registers Microprocessors Physically unclonable function Random access memory random number generator Reconfiguration Reliability Silicon SRAM cells Static random access memory Topology
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Schreiben Sie den ersten Kommentar!