An FIR processor with programmable dynamic data ranges

This work developed a modified direct form based on the radix-4 Booth algorithm to realize a finite impulse response (FIR) architecture with programmable dynamic ranges of input data and filter coefficients. This architecture comprises a preprocessing unit, data latches, configurable connection unit...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2000-08, Vol.8 (4), p.440-446
Hauptverfasser:	Chen, O.T.-C., Wei-Lung Liu
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithm design and analysis Applied sciences Architecture Booths Circuit properties CMOS technology Computer architecture Costs Decoding Digital circuits Dynamic range Dynamics Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Finite impulse response filter Impulse response Latches Memory architecture Microprocessors Pulse and digital circuits Registers Studies Very large scale integration
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