A submicrometer high-performance bipolar technology
The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, poly...
Gespeichert in:
| Veröffentlicht in: | IEEE electron device letters 1989-08, Vol.10 (8), p.364-366 |
|---|---|
| Hauptverfasser: | , , , , , , , , |
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 366 |
|---|---|
| container_issue | 8 |
| container_start_page | 364 |
| container_title | IEEE electron device letters |
| container_volume | 10 |
| creator | Chen, T.-C. Toh, K.Y. Cressler, J.D. Warnock, J. Lu, P.-F. Tang, D.D. Li, G.P. Chuang, C.-T. Ning, T.H. |
| description | The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel AC-coupled active-pull-down (API) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz are demonstrated.< > |
| doi_str_mv | 10.1109/55.31758 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_55_31758</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>31758</ieee_id><sourcerecordid>25436956</sourcerecordid><originalsourceid>FETCH-LOGICAL-c334t-9a80f48f553f9f0ad38cdae28cdf801a771b9f4b6663d216c40e8cee9090fdbb3</originalsourceid><addsrcrecordid>eNqFkD1PwzAQhi0EEqUgsbJlQIgl5VzbiTNWVfmQKrHAbDnOuTVK6mCnQ_89hlRdWe6Ge_Tq3oeQWwozSqF6EmLGaCnkGZlQIWQOomDnZAIlpzmjUFySqxi_ACjnJZ8Qtsjivu6cCb7DAUO2dZtt3mOwPnR6ZzCrXe9bHbIBzXbnW785XJMLq9uIN8c9JZ_Pq4_la75-f3lbLta5YYwPeaUlWC6tEMxWFnTDpGk0ztO0EqguS1pXltdFUbBmTgvDAaVBrKAC29Q1m5KHMbcP_nuPcVCdiwbbVu_Q76OaS5EalvJ_UHBWVEnElDyOYKobY0Cr-uA6HQ6KgvrVp4RQf_oSen_M1NHo1oYkw8UTn37mXEDC7kbMIeLpOkb8AHaSdpE</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>25436956</pqid></control><display><type>article</type><title>A submicrometer high-performance bipolar technology</title><source>IEEE Electronic Library (IEL)</source><creator>Chen, T.-C. ; Toh, K.Y. ; Cressler, J.D. ; Warnock, J. ; Lu, P.-F. ; Tang, D.D. ; Li, G.P. ; Chuang, C.-T. ; Ning, T.H.</creator><creatorcontrib>Chen, T.-C. ; Toh, K.Y. ; Cressler, J.D. ; Warnock, J. ; Lu, P.-F. ; Tang, D.D. ; Li, G.P. ; Chuang, C.-T. ; Ning, T.H.</creatorcontrib><description>The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel AC-coupled active-pull-down (API) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz are demonstrated.< ></description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/55.31758</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Capacitance ; Circuits ; Clocks ; Delay ; Design. Technologies. Operation analysis. Testing ; Electric breakdown ; Electric resistance ; Electronics ; Exact sciences and technology ; Frequency conversion ; Integrated circuits ; Isolation technology ; Rapid thermal annealing ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Surfaces</subject><ispartof>IEEE electron device letters, 1989-08, Vol.10 (8), p.364-366</ispartof><rights>1990 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c334t-9a80f48f553f9f0ad38cdae28cdf801a771b9f4b6663d216c40e8cee9090fdbb3</citedby><cites>FETCH-LOGICAL-c334t-9a80f48f553f9f0ad38cdae28cdf801a771b9f4b6663d216c40e8cee9090fdbb3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/31758$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/31758$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=6634450$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Chen, T.-C.</creatorcontrib><creatorcontrib>Toh, K.Y.</creatorcontrib><creatorcontrib>Cressler, J.D.</creatorcontrib><creatorcontrib>Warnock, J.</creatorcontrib><creatorcontrib>Lu, P.-F.</creatorcontrib><creatorcontrib>Tang, D.D.</creatorcontrib><creatorcontrib>Li, G.P.</creatorcontrib><creatorcontrib>Chuang, C.-T.</creatorcontrib><creatorcontrib>Ning, T.H.</creatorcontrib><title>A submicrometer high-performance bipolar technology</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel AC-coupled active-pull-down (API) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz are demonstrated.< ></description><subject>Applied sciences</subject><subject>Capacitance</subject><subject>Circuits</subject><subject>Clocks</subject><subject>Delay</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric breakdown</subject><subject>Electric resistance</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Frequency conversion</subject><subject>Integrated circuits</subject><subject>Isolation technology</subject><subject>Rapid thermal annealing</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Surfaces</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1989</creationdate><recordtype>article</recordtype><recordid>eNqFkD1PwzAQhi0EEqUgsbJlQIgl5VzbiTNWVfmQKrHAbDnOuTVK6mCnQ_89hlRdWe6Ge_Tq3oeQWwozSqF6EmLGaCnkGZlQIWQOomDnZAIlpzmjUFySqxi_ACjnJZ8Qtsjivu6cCb7DAUO2dZtt3mOwPnR6ZzCrXe9bHbIBzXbnW785XJMLq9uIN8c9JZ_Pq4_la75-f3lbLta5YYwPeaUlWC6tEMxWFnTDpGk0ztO0EqguS1pXltdFUbBmTgvDAaVBrKAC29Q1m5KHMbcP_nuPcVCdiwbbVu_Q76OaS5EalvJ_UHBWVEnElDyOYKobY0Cr-uA6HQ6KgvrVp4RQf_oSen_M1NHo1oYkw8UTn37mXEDC7kbMIeLpOkb8AHaSdpE</recordid><startdate>19890801</startdate><enddate>19890801</enddate><creator>Chen, T.-C.</creator><creator>Toh, K.Y.</creator><creator>Cressler, J.D.</creator><creator>Warnock, J.</creator><creator>Lu, P.-F.</creator><creator>Tang, D.D.</creator><creator>Li, G.P.</creator><creator>Chuang, C.-T.</creator><creator>Ning, T.H.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19890801</creationdate><title>A submicrometer high-performance bipolar technology</title><author>Chen, T.-C. ; Toh, K.Y. ; Cressler, J.D. ; Warnock, J. ; Lu, P.-F. ; Tang, D.D. ; Li, G.P. ; Chuang, C.-T. ; Ning, T.H.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c334t-9a80f48f553f9f0ad38cdae28cdf801a771b9f4b6663d216c40e8cee9090fdbb3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1989</creationdate><topic>Applied sciences</topic><topic>Capacitance</topic><topic>Circuits</topic><topic>Clocks</topic><topic>Delay</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Electric breakdown</topic><topic>Electric resistance</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Frequency conversion</topic><topic>Integrated circuits</topic><topic>Isolation technology</topic><topic>Rapid thermal annealing</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Surfaces</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Chen, T.-C.</creatorcontrib><creatorcontrib>Toh, K.Y.</creatorcontrib><creatorcontrib>Cressler, J.D.</creatorcontrib><creatorcontrib>Warnock, J.</creatorcontrib><creatorcontrib>Lu, P.-F.</creatorcontrib><creatorcontrib>Tang, D.D.</creatorcontrib><creatorcontrib>Li, G.P.</creatorcontrib><creatorcontrib>Chuang, C.-T.</creatorcontrib><creatorcontrib>Ning, T.H.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, T.-C.</au><au>Toh, K.Y.</au><au>Cressler, J.D.</au><au>Warnock, J.</au><au>Lu, P.-F.</au><au>Tang, D.D.</au><au>Li, G.P.</au><au>Chuang, C.-T.</au><au>Ning, T.H.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A submicrometer high-performance bipolar technology</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>1989-08-01</date><risdate>1989</risdate><volume>10</volume><issue>8</issue><spage>364</spage><epage>366</epage><pages>364-366</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel AC-coupled active-pull-down (API) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz are demonstrated.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/55.31758</doi><tpages>3</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0741-3106 |
| ispartof | IEEE electron device letters, 1989-08, Vol.10 (8), p.364-366 |
| issn | 0741-3106 1558-0563 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_55_31758 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Capacitance Circuits Clocks Delay Design. Technologies. Operation analysis. Testing Electric breakdown Electric resistance Electronics Exact sciences and technology Frequency conversion Integrated circuits Isolation technology Rapid thermal annealing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Surfaces |
| title | A submicrometer high-performance bipolar technology |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T06%3A03%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20submicrometer%20high-performance%20bipolar%20technology&rft.jtitle=IEEE%20electron%20device%20letters&rft.au=Chen,%20T.-C.&rft.date=1989-08-01&rft.volume=10&rft.issue=8&rft.spage=364&rft.epage=366&rft.pages=364-366&rft.issn=0741-3106&rft.eissn=1558-0563&rft.coden=EDLEDZ&rft_id=info:doi/10.1109/55.31758&rft_dat=%3Cproquest_RIE%3E25436956%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=25436956&rft_id=info:pmid/&rft_ieee_id=31758&rfr_iscdi=true |