A submicrometer high-performance bipolar technology

A submicrometer high-performance bipolar technology

The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, poly...

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Veröffentlicht in:IEEE electron device letters 1989-08, Vol.10 (8), p.364-366
Hauptverfasser: Chen, T.-C., Toh, K.Y., Cressler, J.D., Warnock, J., Lu, P.-F., Tang, D.D., Li, G.P., Chuang, C.-T., Ning, T.H.
Format: Artikel
Sprache:eng
Schlagworte:
Applied sciences
Capacitance
Circuits
Clocks
Delay
Design. Technologies. Operation analysis. Testing
Electric breakdown
Electric resistance
Electronics
Exact sciences and technology
Frequency conversion
Integrated circuits
Isolation technology
Rapid thermal annealing
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Surfaces
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Zusammenfassung:The description of a submicrometer self-aligned bipolar technology developed to minimize the device topography and to provide shallow profiles for high-performance (ECL) emitter-coupled logic applications is presented. The technology features 0.8- mu m design rules, planar beakless field oxide, polysilicon-filled deep trench isolation, and the use of rapid thermal annealing (RTA). Conventional ECL circuits with 35-ps gate delays, a novel AC-coupled active-pull-down (API) ECL circuit with 21-ps gate delay, and a 1/128 static frequency divider operated at a maximum clocking frequency of 12.5 GHz are demonstrated.< >
ISSN:0741-3106
1558-0563
DOI:10.1109/55.31758