Simultaneous routing and buffer insertion with restrictions on buffer locations

During the routing of global interconnects, macro blocks form useful routing regions which allow wires to go through but forbid buffers to be inserted. They give restrictions on buffer locations. In this paper, we take these buffer location restrictions into consideration and solve the simultaneous...

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Veröffentlicht in:	IEEE transactions on computer-aided design of integrated circuits and systems 2000-07, Vol.19 (7), p.819-824
Hauptverfasser:	Hai Zhou, Wong, D.F., I-Min Liu, Aziz, A.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Automata Buffers Circuit synthesis Circuit testing Computer aided design Constrictions Delay Design automation Design engineering Gold Insertion Iterative methods Latches Logic Routing Sequential circuits Wire
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