Automatic layout recycling based on layout description and linear programming
When a fabrication process is renewed, of practical importance is how to make the best use of layout resources so far accumulated for old fabrication processes. The present paper describes an automatic recycling system for layout data once used dedicatedly for functional cells of the standard-cell l...
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| Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems 1996-08, Vol.15 (8), p.959-967 |
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| container_issue | 8 |
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| container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
| container_volume | 15 |
| creator | Shigehiro, Y. Nagata, T. Shirakawa, I. Arungsrisangchai, I. Takahashi, H. |
| description | When a fabrication process is renewed, of practical importance is how to make the best use of layout resources so far accumulated for old fabrication processes. The present paper describes an automatic recycling system for layout data once used dedicatedly for functional cells of the standard-cell level. The main process of this system is i) to transform given layout data into a layout description format expressed in parameters associated with shapes, sizes, and locations of layout elements, and then ii) to resynthesize an optimal layout in accordance with a new set of design rules by means of a graph theoretic linear programming approach. A part of implementation results is also shown. |
| doi_str_mv | 10.1109/43.511575 |
| format | Article |
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The present paper describes an automatic recycling system for layout data once used dedicatedly for functional cells of the standard-cell level. The main process of this system is i) to transform given layout data into a layout description format expressed in parameters associated with shapes, sizes, and locations of layout elements, and then ii) to resynthesize an optimal layout in accordance with a new set of design rules by means of a graph theoretic linear programming approach. A part of implementation results is also shown.</description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/43.511575</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Design automation ; Design. Technologies. Operation analysis. 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The present paper describes an automatic recycling system for layout data once used dedicatedly for functional cells of the standard-cell level. The main process of this system is i) to transform given layout data into a layout description format expressed in parameters associated with shapes, sizes, and locations of layout elements, and then ii) to resynthesize an optimal layout in accordance with a new set of design rules by means of a graph theoretic linear programming approach. A part of implementation results is also shown.</description><subject>Applied sciences</subject><subject>Design automation</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Fabrication</subject><subject>Integrated circuits</subject><subject>Layout</subject><subject>Linear programming</subject><subject>Process design</subject><subject>Productivity</subject><subject>Recycling</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Technologies. Operation analysis. Testing</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Fabrication</topic><topic>Integrated circuits</topic><topic>Layout</topic><topic>Linear programming</topic><topic>Process design</topic><topic>Productivity</topic><topic>Recycling</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. 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The present paper describes an automatic recycling system for layout data once used dedicatedly for functional cells of the standard-cell level. The main process of this system is i) to transform given layout data into a layout description format expressed in parameters associated with shapes, sizes, and locations of layout elements, and then ii) to resynthesize an optimal layout in accordance with a new set of design rules by means of a graph theoretic linear programming approach. A part of implementation results is also shown.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/43.511575</doi><tpages>9</tpages></addata></record> |
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| identifier | ISSN: 0278-0070 |
| ispartof | IEEE transactions on computer-aided design of integrated circuits and systems, 1996-08, Vol.15 (8), p.959-967 |
| issn | 0278-0070 1937-4151 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_43_511575 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Design automation Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Fabrication Integrated circuits Layout Linear programming Process design Productivity Recycling Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Shape Signal design Systems engineering and theory |
| title | Automatic layout recycling based on layout description and linear programming |
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