0.25- mu m pseudomorphic HEMTs processed with damage-free dry-etch gate-recess technology
Damage-free, dry-etched 0.25- mu m T-shape gate pseudomorphic InGaAs channel HEMTs have been demonstrated. A Freon-12-based discharge was used in either electron cyclotron resonance (ECR) or reactive ion etching (RIE) systems to perform the gate recess process. Etching selectivity of more than 200 w...
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| Veröffentlicht in: | IEEE transactions on electron devices 1992-12, Vol.39 (12), p.2701-2706 |
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| container_end_page | 2706 |
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| container_issue | 12 |
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| container_title | IEEE transactions on electron devices |
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| creator | Ren, F. Pearton, S.J. Abernathy, C.R. Wu, C.S. Hu, M. Pao, C.-K. Wang, D.C. Wen, C.P. |
| description | Damage-free, dry-etched 0.25- mu m T-shape gate pseudomorphic InGaAs channel HEMTs have been demonstrated. A Freon-12-based discharge was used in either electron cyclotron resonance (ECR) or reactive ion etching (RIE) systems to perform the gate recess process. Etching selectivity of more than 200 was obtained between the GaAs cap layer and the underlying AlGaAs donor layer. Self-bias voltages of -30 to -50 V were used in the etching process to minimize the damage. Pre- and post-etch clean steps were utilized to achieve uniform etch and removal of any dry-etch-related residues. Schottky diodes fabricated on n-GaAs subjected to either dry or wet etching showed no differences of barrier height, zero-bias depletion depth, and ideality factor. By using the dry etch for gate recess, very tight threshold voltage uniformity was obtained. The devices showed I-V characteristics comparable to that of devices fabricated with a wet chemical process.< > |
| doi_str_mv | 10.1109/16.168751 |
| format | Article |
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A Freon-12-based discharge was used in either electron cyclotron resonance (ECR) or reactive ion etching (RIE) systems to perform the gate recess process. Etching selectivity of more than 200 was obtained between the GaAs cap layer and the underlying AlGaAs donor layer. Self-bias voltages of -30 to -50 V were used in the etching process to minimize the damage. Pre- and post-etch clean steps were utilized to achieve uniform etch and removal of any dry-etch-related residues. Schottky diodes fabricated on n-GaAs subjected to either dry or wet etching showed no differences of barrier height, zero-bias depletion depth, and ideality factor. By using the dry etch for gate recess, very tight threshold voltage uniformity was obtained. The devices showed I-V characteristics comparable to that of devices fabricated with a wet chemical process.< ></description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/16.168751</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Cyclotrons ; Dry etching ; Electronics ; Electrons ; Exact sciences and technology ; Gallium arsenide ; HEMTs ; Indium gallium arsenide ; MODFETs ; PHEMTs ; Resonance ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Transistors ; Voltage</subject><ispartof>IEEE transactions on electron devices, 1992-12, Vol.39 (12), p.2701-2706</ispartof><rights>1993 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c238t-bca0601f212f00eae5d66149b6c24e9f77082043c6a53159d2b726f358d1cd8f3</citedby><cites>FETCH-LOGICAL-c238t-bca0601f212f00eae5d66149b6c24e9f77082043c6a53159d2b726f358d1cd8f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/168751$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/168751$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=4494241$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Ren, F.</creatorcontrib><creatorcontrib>Pearton, S.J.</creatorcontrib><creatorcontrib>Abernathy, C.R.</creatorcontrib><creatorcontrib>Wu, C.S.</creatorcontrib><creatorcontrib>Hu, M.</creatorcontrib><creatorcontrib>Pao, C.-K.</creatorcontrib><creatorcontrib>Wang, D.C.</creatorcontrib><creatorcontrib>Wen, C.P.</creatorcontrib><title>0.25- mu m pseudomorphic HEMTs processed with damage-free dry-etch gate-recess technology</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>Damage-free, dry-etched 0.25- mu m T-shape gate pseudomorphic InGaAs channel HEMTs have been demonstrated. A Freon-12-based discharge was used in either electron cyclotron resonance (ECR) or reactive ion etching (RIE) systems to perform the gate recess process. Etching selectivity of more than 200 was obtained between the GaAs cap layer and the underlying AlGaAs donor layer. Self-bias voltages of -30 to -50 V were used in the etching process to minimize the damage. Pre- and post-etch clean steps were utilized to achieve uniform etch and removal of any dry-etch-related residues. Schottky diodes fabricated on n-GaAs subjected to either dry or wet etching showed no differences of barrier height, zero-bias depletion depth, and ideality factor. By using the dry etch for gate recess, very tight threshold voltage uniformity was obtained. The devices showed I-V characteristics comparable to that of devices fabricated with a wet chemical process.< ></description><subject>Applied sciences</subject><subject>Cyclotrons</subject><subject>Dry etching</subject><subject>Electronics</subject><subject>Electrons</subject><subject>Exact sciences and technology</subject><subject>Gallium arsenide</subject><subject>HEMTs</subject><subject>Indium gallium arsenide</subject><subject>MODFETs</subject><subject>PHEMTs</subject><subject>Resonance</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Transistors</subject><subject>Voltage</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1992</creationdate><recordtype>article</recordtype><recordid>eNpFkEFLwzAYhoMoOKcHr55yEMFDZpImaXOUMZ0w8TIPnkqWfFkr7VqTlrF_b0eHnl4-eL6HlxehW0ZnjFH9xNSMqSyV7AxNmJQp0UqoczShlGVEJ1lyia5i_B5OJQSfoC8645Lgusc1biP0rqmb0BalxcvF-zriNjQWYgSH92VXYGdqswXiAwB24UCgswXemg5IgCOHO7DFrqma7eEaXXhTRbg55RR9vizW8yVZfby-zZ9XxPIk68jGGqoo85xxTykYkE4pJvRGWS5A-zSlGaciscrIhEnt-Cblyicyc8y6zCdT9DB6h6o_PcQur8tooarMDpo-5lxKQVOtBvBxBG1oYgzg8zaUtQmHnNH8OF7OVD6ON7D3J6mJ1lQ-mJ0t49-DEFpwccTuRqwEgH_d6PgF4kZ1Bg</recordid><startdate>19921201</startdate><enddate>19921201</enddate><creator>Ren, F.</creator><creator>Pearton, S.J.</creator><creator>Abernathy, C.R.</creator><creator>Wu, C.S.</creator><creator>Hu, M.</creator><creator>Pao, C.-K.</creator><creator>Wang, D.C.</creator><creator>Wen, C.P.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>19921201</creationdate><title>0.25- mu m pseudomorphic HEMTs processed with damage-free dry-etch gate-recess technology</title><author>Ren, F. ; Pearton, S.J. ; Abernathy, C.R. ; Wu, C.S. ; Hu, M. ; Pao, C.-K. ; Wang, D.C. ; Wen, C.P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c238t-bca0601f212f00eae5d66149b6c24e9f77082043c6a53159d2b726f358d1cd8f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Applied sciences</topic><topic>Cyclotrons</topic><topic>Dry etching</topic><topic>Electronics</topic><topic>Electrons</topic><topic>Exact sciences and technology</topic><topic>Gallium arsenide</topic><topic>HEMTs</topic><topic>Indium gallium arsenide</topic><topic>MODFETs</topic><topic>PHEMTs</topic><topic>Resonance</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Transistors</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ren, F.</creatorcontrib><creatorcontrib>Pearton, S.J.</creatorcontrib><creatorcontrib>Abernathy, C.R.</creatorcontrib><creatorcontrib>Wu, C.S.</creatorcontrib><creatorcontrib>Hu, M.</creatorcontrib><creatorcontrib>Pao, C.-K.</creatorcontrib><creatorcontrib>Wang, D.C.</creatorcontrib><creatorcontrib>Wen, C.P.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ren, F.</au><au>Pearton, S.J.</au><au>Abernathy, C.R.</au><au>Wu, C.S.</au><au>Hu, M.</au><au>Pao, C.-K.</au><au>Wang, D.C.</au><au>Wen, C.P.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>0.25- mu m pseudomorphic HEMTs processed with damage-free dry-etch gate-recess technology</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>1992-12-01</date><risdate>1992</risdate><volume>39</volume><issue>12</issue><spage>2701</spage><epage>2706</epage><pages>2701-2706</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>Damage-free, dry-etched 0.25- mu m T-shape gate pseudomorphic InGaAs channel HEMTs have been demonstrated. A Freon-12-based discharge was used in either electron cyclotron resonance (ECR) or reactive ion etching (RIE) systems to perform the gate recess process. Etching selectivity of more than 200 was obtained between the GaAs cap layer and the underlying AlGaAs donor layer. Self-bias voltages of -30 to -50 V were used in the etching process to minimize the damage. Pre- and post-etch clean steps were utilized to achieve uniform etch and removal of any dry-etch-related residues. Schottky diodes fabricated on n-GaAs subjected to either dry or wet etching showed no differences of barrier height, zero-bias depletion depth, and ideality factor. By using the dry etch for gate recess, very tight threshold voltage uniformity was obtained. The devices showed I-V characteristics comparable to that of devices fabricated with a wet chemical process.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/16.168751</doi><tpages>6</tpages></addata></record> |
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| source | IEEE/IET Electronic Library (IEL) |
| subjects | Applied sciences Cyclotrons Dry etching Electronics Electrons Exact sciences and technology Gallium arsenide HEMTs Indium gallium arsenide MODFETs PHEMTs Resonance Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Transistors Voltage |
| title | 0.25- mu m pseudomorphic HEMTs processed with damage-free dry-etch gate-recess technology |
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