5-GHz integer-N PLL with spur reduction sampler

In this work, a 5-GHz current-controlled ring oscillator based integer PLL is implemented with a spur reduction sampler to reduce the reference spurs. The sampler can have taps with each tap sampling the oscillator's control voltage at offsets of the reference phase. The sampler introduces bandstop notches at the frequencies where the spurs appear. The samplers are capable of reducing the spurs from $-15$−15 to $-65\,{\rm dBc}$−65dBc, a reduction by 50 dB, as evident from simulation results performed in 28 nm technology.