A New FPGA/DSP-Based Parallel Architecture for Real-Time Image Processing

In this article, we present a new reconfigurable parallel architecture oriented to video-rate computer vision applications. This architecture is structured with a two-dimensional (2D) array of FPGA/DSP-based reprogrammable processors P ij . These processors are interconnected by means of a systolic...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	Real-time imaging 2002-10, Vol.8 (5), p.345-356
Hauptverfasser:	Batlle, J., Martı&#x0301, J., Ridao, P., Amat, J.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Electronics Exact sciences and technology Image processing Information, signal and communications theory Integrated circuits Integrated circuits by function (including memories and processors) Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Signal processing Telecommunications and information theory
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!