A 1.2 V 83 dB DR single-ended input SC ΔΣ modulator including a large-swing analog buffer for portable ECG applications
Summary This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power...
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Veröffentlicht in: | International journal of circuit theory and applications 2016-12, Vol.44 (12), p.2164-2173 |
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creator | Duan, Quanzhen Jung, Youngjae Choi, Danbi Roh, Jeongjin Kim, Jongpal |
description | Summary
This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm2 with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.
A subsystem consisting of an analog buffer and a single‐ended input to a fully‐differential ΔΣ modulator is proposed to obtain low‐power consumption for portable electrocardiogram applications. The ΔΣ modulator with a second order, 1 bit, and CIFF structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a DAC feedback circuit to reduce the effect of the reference voltage, reduce the requirement of amplifier, and obtain low‐power consumption. |
doi_str_mv | 10.1002/cta.2219 |
format | Article |
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This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm2 with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.
A subsystem consisting of an analog buffer and a single‐ended input to a fully‐differential ΔΣ modulator is proposed to obtain low‐power consumption for portable electrocardiogram applications. The ΔΣ modulator with a second order, 1 bit, and CIFF structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a DAC feedback circuit to reduce the effect of the reference voltage, reduce the requirement of amplifier, and obtain low‐power consumption.</description><identifier>ISSN: 0098-9886</identifier><identifier>EISSN: 1097-007X</identifier><identifier>DOI: 10.1002/cta.2219</identifier><language>eng</language><publisher>Blackwell Publishing Ltd</publisher><subject>analog buffer ; electrocardiogram ; low-power consumption ; single-end input ; ΔΣ modulator</subject><ispartof>International journal of circuit theory and applications, 2016-12, Vol.44 (12), p.2164-2173</ispartof><rights>Copyright © 2016 John Wiley & Sons, Ltd.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c2189-f025254a76bedb3b15a47084f435b9832325cba0e214cfb68d5443798b8fd833</citedby><cites>FETCH-LOGICAL-c2189-f025254a76bedb3b15a47084f435b9832325cba0e214cfb68d5443798b8fd833</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fcta.2219$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fcta.2219$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,776,780,1411,27901,27902,45550,45551</link.rule.ids></links><search><creatorcontrib>Duan, Quanzhen</creatorcontrib><creatorcontrib>Jung, Youngjae</creatorcontrib><creatorcontrib>Choi, Danbi</creatorcontrib><creatorcontrib>Roh, Jeongjin</creatorcontrib><creatorcontrib>Kim, Jongpal</creatorcontrib><title>A 1.2 V 83 dB DR single-ended input SC ΔΣ modulator including a large-swing analog buffer for portable ECG applications</title><title>International journal of circuit theory and applications</title><addtitle>Int. J. Circ. Theor. Appl</addtitle><description>Summary
This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm2 with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.
A subsystem consisting of an analog buffer and a single‐ended input to a fully‐differential ΔΣ modulator is proposed to obtain low‐power consumption for portable electrocardiogram applications. The ΔΣ modulator with a second order, 1 bit, and CIFF structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a DAC feedback circuit to reduce the effect of the reference voltage, reduce the requirement of amplifier, and obtain low‐power consumption.</description><subject>analog buffer</subject><subject>electrocardiogram</subject><subject>low-power consumption</subject><subject>single-end input</subject><subject>ΔΣ modulator</subject><issn>0098-9886</issn><issn>1097-007X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><recordid>eNp10MtKxDAYBeAgCo4X8BGydJMxl16S5Vh1VLzhDOouJG0yVGNbkpZxFoJb976B7-ND-CTWC4ILV4f_5-MsDgBbBA8JxnQnb9WQUiKWwIBgkSKM05tlMMBYcCQ4T1bBWgi3GGNOmRiAxxEkQ_r-9HwFOeuj2IV7lzCU1cwZZKrCFLCsmq6Fkwy-vby9wvu66Jxqa9__c9cVvYQKOuVnBoX511UpV8-g7qw1HtpeNrVvlXYG7mdjqJrGlblqy7oKG2DFKhfM5k-ug-nB_jQ7RCfn46NsdIJySrhAFtOYxpFKE20KzTSJVZRiHtmIxVpwRhmNc62woSTKrU54EUcRSwXX3BacsXWw_V2b-zoEb6xsfHmv_EISLD9Xk_1q8nO1nqJvOi-dWfzrZDYd_fVlaM3Dr1f-TiYpS2N5fTaWdHJ8mkwuhbxgHyM9fzI</recordid><startdate>201612</startdate><enddate>201612</enddate><creator>Duan, Quanzhen</creator><creator>Jung, Youngjae</creator><creator>Choi, Danbi</creator><creator>Roh, Jeongjin</creator><creator>Kim, Jongpal</creator><general>Blackwell Publishing Ltd</general><scope>BSCLL</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201612</creationdate><title>A 1.2 V 83 dB DR single-ended input SC ΔΣ modulator including a large-swing analog buffer for portable ECG applications</title><author>Duan, Quanzhen ; Jung, Youngjae ; Choi, Danbi ; Roh, Jeongjin ; Kim, Jongpal</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2189-f025254a76bedb3b15a47084f435b9832325cba0e214cfb68d5443798b8fd833</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>analog buffer</topic><topic>electrocardiogram</topic><topic>low-power consumption</topic><topic>single-end input</topic><topic>ΔΣ modulator</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Duan, Quanzhen</creatorcontrib><creatorcontrib>Jung, Youngjae</creatorcontrib><creatorcontrib>Choi, Danbi</creatorcontrib><creatorcontrib>Roh, Jeongjin</creatorcontrib><creatorcontrib>Kim, Jongpal</creatorcontrib><collection>Istex</collection><collection>CrossRef</collection><jtitle>International journal of circuit theory and applications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Duan, Quanzhen</au><au>Jung, Youngjae</au><au>Choi, Danbi</au><au>Roh, Jeongjin</au><au>Kim, Jongpal</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 1.2 V 83 dB DR single-ended input SC ΔΣ modulator including a large-swing analog buffer for portable ECG applications</atitle><jtitle>International journal of circuit theory and applications</jtitle><addtitle>Int. J. Circ. Theor. Appl</addtitle><date>2016-12</date><risdate>2016</risdate><volume>44</volume><issue>12</issue><spage>2164</spage><epage>2173</epage><pages>2164-2173</pages><issn>0098-9886</issn><eissn>1097-007X</eissn><abstract>Summary
This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm2 with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.
A subsystem consisting of an analog buffer and a single‐ended input to a fully‐differential ΔΣ modulator is proposed to obtain low‐power consumption for portable electrocardiogram applications. The ΔΣ modulator with a second order, 1 bit, and CIFF structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a DAC feedback circuit to reduce the effect of the reference voltage, reduce the requirement of amplifier, and obtain low‐power consumption.</abstract><pub>Blackwell Publishing Ltd</pub><doi>10.1002/cta.2219</doi><tpages>10</tpages></addata></record> |
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subjects | analog buffer electrocardiogram low-power consumption single-end input ΔΣ modulator |
title | A 1.2 V 83 dB DR single-ended input SC ΔΣ modulator including a large-swing analog buffer for portable ECG applications |
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