Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits
Heterogeneous systems with analog CMOS circuits integrated with nanoscale memristive devices enable efficient deployment of neural networks on neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal dynamics by operating with extremely low current levels. Nevertheless, the cu...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , , |
---|---|
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Garg, Nikhil Florini, Davide Dufour, Patrick Muhr, Eloir Faye, Mathieu Bocquet, Marc Querlioz, Damien Beilliard, Yann Drouin, Dominique Alibart, Fabien Portal, Jean-Michel |
description | Heterogeneous systems with analog CMOS circuits integrated with nanoscale
memristive devices enable efficient deployment of neural networks on
neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal
dynamics by operating with extremely low current levels. Nevertheless, the
current read from the memristive synapses can be higher by several orders of
magnitude, and performing impedance matching between neurons and synapses is
mandatory. In this paper, we implement an analog leaky integrate and fire (LIF)
neuron with a voltage regulator and current attenuator for interfacing CMOS
neurons with memristive synapses. In addition, the neuron design proposes a
dual leakage that could enable the implementation of local learning rules such
as voltage-dependent synaptic plasticity. We also propose a connection scheme
to implement adaptive LIF neurons based on two-neuron interaction. The proposed
circuits can be used to interface with a variety of synaptic devices and
process signals of diverse temporal dynamics. |
doi_str_mv | 10.48550/arxiv.2406.19667 |
format | Article |
fullrecord | <record><control><sourceid>arxiv_GOX</sourceid><recordid>TN_cdi_arxiv_primary_2406_19667</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2406_19667</sourcerecordid><originalsourceid>FETCH-arxiv_primary_2406_196673</originalsourceid><addsrcrecordid>eNpjYJA0NNAzsTA1NdBPLKrILNMzMjEw0zO0NDMz52TwD0stKk4sycxJVXD29Q9WcMxLzMlPV_DxdFPwSy0tys9TSMsvUvBNzS3KLC7JL9L1zCtJTS9KLElNgcjn5hcVZGQmKzhnFiWXZpYU8zCwpiXmFKfyQmluBnk31xBnD12w1fEFRZm5iUWV8SAnxIOdYExYBQBzIDwB</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits</title><source>arXiv.org</source><creator>Garg, Nikhil ; Florini, Davide ; Dufour, Patrick ; Muhr, Eloir ; Faye, Mathieu ; Bocquet, Marc ; Querlioz, Damien ; Beilliard, Yann ; Drouin, Dominique ; Alibart, Fabien ; Portal, Jean-Michel</creator><creatorcontrib>Garg, Nikhil ; Florini, Davide ; Dufour, Patrick ; Muhr, Eloir ; Faye, Mathieu ; Bocquet, Marc ; Querlioz, Damien ; Beilliard, Yann ; Drouin, Dominique ; Alibart, Fabien ; Portal, Jean-Michel</creatorcontrib><description>Heterogeneous systems with analog CMOS circuits integrated with nanoscale
memristive devices enable efficient deployment of neural networks on
neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal
dynamics by operating with extremely low current levels. Nevertheless, the
current read from the memristive synapses can be higher by several orders of
magnitude, and performing impedance matching between neurons and synapses is
mandatory. In this paper, we implement an analog leaky integrate and fire (LIF)
neuron with a voltage regulator and current attenuator for interfacing CMOS
neurons with memristive synapses. In addition, the neuron design proposes a
dual leakage that could enable the implementation of local learning rules such
as voltage-dependent synaptic plasticity. We also propose a connection scheme
to implement adaptive LIF neurons based on two-neuron interaction. The proposed
circuits can be used to interface with a variety of synaptic devices and
process signals of diverse temporal dynamics.</description><identifier>DOI: 10.48550/arxiv.2406.19667</identifier><language>eng</language><subject>Computer Science - Emerging Technologies</subject><creationdate>2024-06</creationdate><rights>http://arxiv.org/licenses/nonexclusive-distrib/1.0</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>228,230,776,881</link.rule.ids><linktorsrc>$$Uhttps://arxiv.org/abs/2406.19667$$EView_record_in_Cornell_University$$FView_record_in_$$GCornell_University$$Hfree_for_read</linktorsrc><backlink>$$Uhttps://doi.org/10.48550/arXiv.2406.19667$$DView paper in arXiv$$Hfree_for_read</backlink></links><search><creatorcontrib>Garg, Nikhil</creatorcontrib><creatorcontrib>Florini, Davide</creatorcontrib><creatorcontrib>Dufour, Patrick</creatorcontrib><creatorcontrib>Muhr, Eloir</creatorcontrib><creatorcontrib>Faye, Mathieu</creatorcontrib><creatorcontrib>Bocquet, Marc</creatorcontrib><creatorcontrib>Querlioz, Damien</creatorcontrib><creatorcontrib>Beilliard, Yann</creatorcontrib><creatorcontrib>Drouin, Dominique</creatorcontrib><creatorcontrib>Alibart, Fabien</creatorcontrib><creatorcontrib>Portal, Jean-Michel</creatorcontrib><title>Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits</title><description>Heterogeneous systems with analog CMOS circuits integrated with nanoscale
memristive devices enable efficient deployment of neural networks on
neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal
dynamics by operating with extremely low current levels. Nevertheless, the
current read from the memristive synapses can be higher by several orders of
magnitude, and performing impedance matching between neurons and synapses is
mandatory. In this paper, we implement an analog leaky integrate and fire (LIF)
neuron with a voltage regulator and current attenuator for interfacing CMOS
neurons with memristive synapses. In addition, the neuron design proposes a
dual leakage that could enable the implementation of local learning rules such
as voltage-dependent synaptic plasticity. We also propose a connection scheme
to implement adaptive LIF neurons based on two-neuron interaction. The proposed
circuits can be used to interface with a variety of synaptic devices and
process signals of diverse temporal dynamics.</description><subject>Computer Science - Emerging Technologies</subject><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><sourceid>GOX</sourceid><recordid>eNpjYJA0NNAzsTA1NdBPLKrILNMzMjEw0zO0NDMz52TwD0stKk4sycxJVXD29Q9WcMxLzMlPV_DxdFPwSy0tys9TSMsvUvBNzS3KLC7JL9L1zCtJTS9KLElNgcjn5hcVZGQmKzhnFiWXZpYU8zCwpiXmFKfyQmluBnk31xBnD12w1fEFRZm5iUWV8SAnxIOdYExYBQBzIDwB</recordid><startdate>20240628</startdate><enddate>20240628</enddate><creator>Garg, Nikhil</creator><creator>Florini, Davide</creator><creator>Dufour, Patrick</creator><creator>Muhr, Eloir</creator><creator>Faye, Mathieu</creator><creator>Bocquet, Marc</creator><creator>Querlioz, Damien</creator><creator>Beilliard, Yann</creator><creator>Drouin, Dominique</creator><creator>Alibart, Fabien</creator><creator>Portal, Jean-Michel</creator><scope>AKY</scope><scope>GOX</scope></search><sort><creationdate>20240628</creationdate><title>Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits</title><author>Garg, Nikhil ; Florini, Davide ; Dufour, Patrick ; Muhr, Eloir ; Faye, Mathieu ; Bocquet, Marc ; Querlioz, Damien ; Beilliard, Yann ; Drouin, Dominique ; Alibart, Fabien ; Portal, Jean-Michel</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-arxiv_primary_2406_196673</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>Computer Science - Emerging Technologies</topic><toplevel>online_resources</toplevel><creatorcontrib>Garg, Nikhil</creatorcontrib><creatorcontrib>Florini, Davide</creatorcontrib><creatorcontrib>Dufour, Patrick</creatorcontrib><creatorcontrib>Muhr, Eloir</creatorcontrib><creatorcontrib>Faye, Mathieu</creatorcontrib><creatorcontrib>Bocquet, Marc</creatorcontrib><creatorcontrib>Querlioz, Damien</creatorcontrib><creatorcontrib>Beilliard, Yann</creatorcontrib><creatorcontrib>Drouin, Dominique</creatorcontrib><creatorcontrib>Alibart, Fabien</creatorcontrib><creatorcontrib>Portal, Jean-Michel</creatorcontrib><collection>arXiv Computer Science</collection><collection>arXiv.org</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Garg, Nikhil</au><au>Florini, Davide</au><au>Dufour, Patrick</au><au>Muhr, Eloir</au><au>Faye, Mathieu</au><au>Bocquet, Marc</au><au>Querlioz, Damien</au><au>Beilliard, Yann</au><au>Drouin, Dominique</au><au>Alibart, Fabien</au><au>Portal, Jean-Michel</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits</atitle><date>2024-06-28</date><risdate>2024</risdate><abstract>Heterogeneous systems with analog CMOS circuits integrated with nanoscale
memristive devices enable efficient deployment of neural networks on
neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal
dynamics by operating with extremely low current levels. Nevertheless, the
current read from the memristive synapses can be higher by several orders of
magnitude, and performing impedance matching between neurons and synapses is
mandatory. In this paper, we implement an analog leaky integrate and fire (LIF)
neuron with a voltage regulator and current attenuator for interfacing CMOS
neurons with memristive synapses. In addition, the neuron design proposes a
dual leakage that could enable the implementation of local learning rules such
as voltage-dependent synaptic plasticity. We also propose a connection scheme
to implement adaptive LIF neurons based on two-neuron interaction. The proposed
circuits can be used to interface with a variety of synaptic devices and
process signals of diverse temporal dynamics.</abstract><doi>10.48550/arxiv.2406.19667</doi><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | DOI: 10.48550/arxiv.2406.19667 |
ispartof | |
issn | |
language | eng |
recordid | cdi_arxiv_primary_2406_19667 |
source | arXiv.org |
subjects | Computer Science - Emerging Technologies |
title | Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T02%3A18%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-arxiv_GOX&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Versatile%20CMOS%20Analog%20LIF%20Neuron%20for%20Memristor-Integrated%20Neuromorphic%20Circuits&rft.au=Garg,%20Nikhil&rft.date=2024-06-28&rft_id=info:doi/10.48550/arxiv.2406.19667&rft_dat=%3Carxiv_GOX%3E2406_19667%3C/arxiv_GOX%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |