Verifying Bit-vector Invertibility Conditions in Coq (Extended Abstract)

Verifying Bit-vector Invertibility Conditions in Coq (Extended Abstract)

This work is a part of an ongoing effort to prove the correctness of invertibility conditions for the theory of fixed-width bit-vectors, which are used to solve quantified bit-vector formulas in the Satisfiability Modulo Theories (SMT) solver CVC4. While many of these were proved in a completely aut...

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Veröffentlicht in:arXiv.org 2019-08
Hauptverfasser: Ekici, Burak, Viswanathan, Arjun, Zohar, Yoni, Barrett, Clark, Tinelli, Cesare
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Computer Science - Logic in Computer Science
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description This work is a part of an ongoing effort to prove the correctness of invertibility conditions for the theory of fixed-width bit-vectors, which are used to solve quantified bit-vector formulas in the Satisfiability Modulo Theories (SMT) solver CVC4. While many of these were proved in a completely automatic fashion for any bit-width, some were only proved for bit-widths up to 65, even though they are being used to solve formulas over arbitrary bit-widths. In this paper we describe our initial efforts in proving a subset of these invertibility conditions in the Coq proof assistant. We describe the Coq library that we use, as well as the extensions that we introduced to it.
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title Verifying Bit-vector Invertibility Conditions in Coq (Extended Abstract)
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