All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:arXiv.org 2020-04
Hauptverfasser: Nandakumar Nambath, Ashok, Rakesh, Manikandan, Sarath, Nandish Bharat Thaker, Anghan, Mehul, Kamran, Rashmi, Anmadwar, Saurabh, Gupta, Shalabh
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title arXiv.org
container_volume
creator Nandakumar Nambath
Ashok, Rakesh
Manikandan, Sarath
Nandish Bharat Thaker
Anghan, Mehul
Kamran, Rashmi
Anmadwar, Saurabh
Gupta, Shalabh
description In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in the analog domain itself, which can significantly reduce the power consumption as well as the complexity of the receiver. The first all-analog adaptive equalizer for receivers of coherent dual-polarization optical links has been presented with its detailed architecture and measurement results. The proof-of-concept equalizer uses the constant modulus algorithm for blind adaptation of its weight coefficients to implement a 4x4 2-tap FIR filter in 130 nm SiGe BiCMOS technology. Its functionality is evaluated experimentally for 40 Gb /s data rate and 10 km standard single-mode fiber channel. This demonstration shows that the use of all-analog processing for short-reach data-center interconnects is feasible and is a much simpler solution than the use of the high-speed ADC+DSP based approach. Moreover, when implemented in advanced CMOS or FinFET technologies, the power consumption of the equalizer is expected to be significantly lower than the DSP based implementations in similar process technologies.
doi_str_mv 10.48550/arxiv.1907.10275
format Article
fullrecord <record><control><sourceid>proquest_arxiv</sourceid><recordid>TN_cdi_arxiv_primary_1907_10275</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2263713386</sourcerecordid><originalsourceid>FETCH-LOGICAL-a526-6e45abe1e96c5489aba5649aefc1e8afbc539b3fc8d798aabe27451df0ab90c13</originalsourceid><addsrcrecordid>eNotj0tLw0AUhQdBsNT-AFcGXCfOI_NahrRqoeCm-3AzudGUmKQzSVF_vWnr5p4L5-PAR8gDo0lqpKTP4L-bU8Is1QmjXMsbsuBCsNiknN-RVQgHSilXmkspFmSdtW2cddD2H1FWwTA2J4w2xwna5hd9VPc-yvtP9NiN0RpGiPL5m4vt-bq-69CN4Z7c1tAGXP3nkuxfNvv8Ld69v27zbBeD5CpWmEookaFVTqbGQglSpRawdgwN1KWTwpaidqbS1sCMcp1KVtUUSksdE0vyeJ29KBaDb77A_xRn1eKiOhNPV2Lw_XHCMBaHfvKzXSg4V0IzIYwSf6s3VxY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2263713386</pqid></control><display><type>article</type><title>All-Analog Adaptive Equalizer for Coherent Data Center Interconnects</title><source>arXiv.org</source><source>Free E- Journals</source><creator>Nandakumar Nambath ; Ashok, Rakesh ; Manikandan, Sarath ; Nandish Bharat Thaker ; Anghan, Mehul ; Kamran, Rashmi ; Anmadwar, Saurabh ; Gupta, Shalabh</creator><creatorcontrib>Nandakumar Nambath ; Ashok, Rakesh ; Manikandan, Sarath ; Nandish Bharat Thaker ; Anghan, Mehul ; Kamran, Rashmi ; Anmadwar, Saurabh ; Gupta, Shalabh</creatorcontrib><description>In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in the analog domain itself, which can significantly reduce the power consumption as well as the complexity of the receiver. The first all-analog adaptive equalizer for receivers of coherent dual-polarization optical links has been presented with its detailed architecture and measurement results. The proof-of-concept equalizer uses the constant modulus algorithm for blind adaptation of its weight coefficients to implement a 4x4 2-tap FIR filter in 130 nm SiGe BiCMOS technology. Its functionality is evaluated experimentally for 40 Gb /s data rate and 10 km standard single-mode fiber channel. This demonstration shows that the use of all-analog processing for short-reach data-center interconnects is feasible and is a much simpler solution than the use of the high-speed ADC+DSP based approach. Moreover, when implemented in advanced CMOS or FinFET technologies, the power consumption of the equalizer is expected to be significantly lower than the DSP based implementations in similar process technologies.</description><identifier>EISSN: 2331-8422</identifier><identifier>DOI: 10.48550/arxiv.1907.10275</identifier><language>eng</language><publisher>Ithaca: Cornell University Library, arXiv.org</publisher><subject>Algorithms ; Architecture ; Circuits ; Computer centers ; Computer simulation ; Data centers ; Dual polarization (waves) ; Interconnections ; Optical communication ; Optical data processing ; Quadrature phase shift keying ; Signal processing</subject><ispartof>arXiv.org, 2020-04</ispartof><rights>2020. This work is published under http://arxiv.org/licenses/nonexclusive-distrib/1.0/ (the “License”). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.</rights><rights>http://arxiv.org/licenses/nonexclusive-distrib/1.0</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>228,230,780,784,885,27925</link.rule.ids><backlink>$$Uhttps://doi.org/10.1109/JLT.2020.2987140$$DView published paper (Access to full text may be restricted)$$Hfree_for_read</backlink><backlink>$$Uhttps://doi.org/10.48550/arXiv.1907.10275$$DView paper in arXiv$$Hfree_for_read</backlink></links><search><creatorcontrib>Nandakumar Nambath</creatorcontrib><creatorcontrib>Ashok, Rakesh</creatorcontrib><creatorcontrib>Manikandan, Sarath</creatorcontrib><creatorcontrib>Nandish Bharat Thaker</creatorcontrib><creatorcontrib>Anghan, Mehul</creatorcontrib><creatorcontrib>Kamran, Rashmi</creatorcontrib><creatorcontrib>Anmadwar, Saurabh</creatorcontrib><creatorcontrib>Gupta, Shalabh</creatorcontrib><title>All-Analog Adaptive Equalizer for Coherent Data Center Interconnects</title><title>arXiv.org</title><description>In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in the analog domain itself, which can significantly reduce the power consumption as well as the complexity of the receiver. The first all-analog adaptive equalizer for receivers of coherent dual-polarization optical links has been presented with its detailed architecture and measurement results. The proof-of-concept equalizer uses the constant modulus algorithm for blind adaptation of its weight coefficients to implement a 4x4 2-tap FIR filter in 130 nm SiGe BiCMOS technology. Its functionality is evaluated experimentally for 40 Gb /s data rate and 10 km standard single-mode fiber channel. This demonstration shows that the use of all-analog processing for short-reach data-center interconnects is feasible and is a much simpler solution than the use of the high-speed ADC+DSP based approach. Moreover, when implemented in advanced CMOS or FinFET technologies, the power consumption of the equalizer is expected to be significantly lower than the DSP based implementations in similar process technologies.</description><subject>Algorithms</subject><subject>Architecture</subject><subject>Circuits</subject><subject>Computer centers</subject><subject>Computer simulation</subject><subject>Data centers</subject><subject>Dual polarization (waves)</subject><subject>Interconnections</subject><subject>Optical communication</subject><subject>Optical data processing</subject><subject>Quadrature phase shift keying</subject><subject>Signal processing</subject><issn>2331-8422</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2020</creationdate><recordtype>article</recordtype><sourceid>ABUWG</sourceid><sourceid>AFKRA</sourceid><sourceid>AZQEC</sourceid><sourceid>BENPR</sourceid><sourceid>CCPQU</sourceid><sourceid>DWQXO</sourceid><sourceid>GOX</sourceid><recordid>eNotj0tLw0AUhQdBsNT-AFcGXCfOI_NahrRqoeCm-3AzudGUmKQzSVF_vWnr5p4L5-PAR8gDo0lqpKTP4L-bU8Is1QmjXMsbsuBCsNiknN-RVQgHSilXmkspFmSdtW2cddD2H1FWwTA2J4w2xwna5hd9VPc-yvtP9NiN0RpGiPL5m4vt-bq-69CN4Z7c1tAGXP3nkuxfNvv8Ld69v27zbBeD5CpWmEookaFVTqbGQglSpRawdgwN1KWTwpaidqbS1sCMcp1KVtUUSksdE0vyeJ29KBaDb77A_xRn1eKiOhNPV2Lw_XHCMBaHfvKzXSg4V0IzIYwSf6s3VxY</recordid><startdate>20200412</startdate><enddate>20200412</enddate><creator>Nandakumar Nambath</creator><creator>Ashok, Rakesh</creator><creator>Manikandan, Sarath</creator><creator>Nandish Bharat Thaker</creator><creator>Anghan, Mehul</creator><creator>Kamran, Rashmi</creator><creator>Anmadwar, Saurabh</creator><creator>Gupta, Shalabh</creator><general>Cornell University Library, arXiv.org</general><scope>8FE</scope><scope>8FG</scope><scope>ABJCF</scope><scope>ABUWG</scope><scope>AFKRA</scope><scope>AZQEC</scope><scope>BENPR</scope><scope>BGLVJ</scope><scope>CCPQU</scope><scope>DWQXO</scope><scope>HCIFZ</scope><scope>L6V</scope><scope>M7S</scope><scope>PIMPY</scope><scope>PQEST</scope><scope>PQQKQ</scope><scope>PQUKI</scope><scope>PTHSS</scope><scope>GOX</scope></search><sort><creationdate>20200412</creationdate><title>All-Analog Adaptive Equalizer for Coherent Data Center Interconnects</title><author>Nandakumar Nambath ; Ashok, Rakesh ; Manikandan, Sarath ; Nandish Bharat Thaker ; Anghan, Mehul ; Kamran, Rashmi ; Anmadwar, Saurabh ; Gupta, Shalabh</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a526-6e45abe1e96c5489aba5649aefc1e8afbc539b3fc8d798aabe27451df0ab90c13</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Algorithms</topic><topic>Architecture</topic><topic>Circuits</topic><topic>Computer centers</topic><topic>Computer simulation</topic><topic>Data centers</topic><topic>Dual polarization (waves)</topic><topic>Interconnections</topic><topic>Optical communication</topic><topic>Optical data processing</topic><topic>Quadrature phase shift keying</topic><topic>Signal processing</topic><toplevel>online_resources</toplevel><creatorcontrib>Nandakumar Nambath</creatorcontrib><creatorcontrib>Ashok, Rakesh</creatorcontrib><creatorcontrib>Manikandan, Sarath</creatorcontrib><creatorcontrib>Nandish Bharat Thaker</creatorcontrib><creatorcontrib>Anghan, Mehul</creatorcontrib><creatorcontrib>Kamran, Rashmi</creatorcontrib><creatorcontrib>Anmadwar, Saurabh</creatorcontrib><creatorcontrib>Gupta, Shalabh</creatorcontrib><collection>ProQuest SciTech Collection</collection><collection>ProQuest Technology Collection</collection><collection>Materials Science &amp; Engineering Collection</collection><collection>ProQuest Central (Alumni Edition)</collection><collection>ProQuest Central UK/Ireland</collection><collection>ProQuest Central Essentials</collection><collection>ProQuest Central</collection><collection>Technology Collection</collection><collection>ProQuest One Community College</collection><collection>ProQuest Central Korea</collection><collection>SciTech Premium Collection</collection><collection>ProQuest Engineering Collection</collection><collection>Engineering Database</collection><collection>Publicly Available Content Database</collection><collection>ProQuest One Academic Eastern Edition (DO NOT USE)</collection><collection>ProQuest One Academic</collection><collection>ProQuest One Academic UKI Edition</collection><collection>Engineering Collection</collection><collection>arXiv.org</collection><jtitle>arXiv.org</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Nandakumar Nambath</au><au>Ashok, Rakesh</au><au>Manikandan, Sarath</au><au>Nandish Bharat Thaker</au><au>Anghan, Mehul</au><au>Kamran, Rashmi</au><au>Anmadwar, Saurabh</au><au>Gupta, Shalabh</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>All-Analog Adaptive Equalizer for Coherent Data Center Interconnects</atitle><jtitle>arXiv.org</jtitle><date>2020-04-12</date><risdate>2020</risdate><eissn>2331-8422</eissn><abstract>In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in the analog domain itself, which can significantly reduce the power consumption as well as the complexity of the receiver. The first all-analog adaptive equalizer for receivers of coherent dual-polarization optical links has been presented with its detailed architecture and measurement results. The proof-of-concept equalizer uses the constant modulus algorithm for blind adaptation of its weight coefficients to implement a 4x4 2-tap FIR filter in 130 nm SiGe BiCMOS technology. Its functionality is evaluated experimentally for 40 Gb /s data rate and 10 km standard single-mode fiber channel. This demonstration shows that the use of all-analog processing for short-reach data-center interconnects is feasible and is a much simpler solution than the use of the high-speed ADC+DSP based approach. Moreover, when implemented in advanced CMOS or FinFET technologies, the power consumption of the equalizer is expected to be significantly lower than the DSP based implementations in similar process technologies.</abstract><cop>Ithaca</cop><pub>Cornell University Library, arXiv.org</pub><doi>10.48550/arxiv.1907.10275</doi><oa>free_for_read</oa></addata></record>
fulltext fulltext
identifier EISSN: 2331-8422
ispartof arXiv.org, 2020-04
issn 2331-8422
language eng
recordid cdi_arxiv_primary_1907_10275
source arXiv.org; Free E- Journals
subjects Algorithms
Architecture
Circuits
Computer centers
Computer simulation
Data centers
Dual polarization (waves)
Interconnections
Optical communication
Optical data processing
Quadrature phase shift keying
Signal processing
title All-Analog Adaptive Equalizer for Coherent Data Center Interconnects
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T04%3A22%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_arxiv&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=All-Analog%20Adaptive%20Equalizer%20for%20Coherent%20Data%20Center%20Interconnects&rft.jtitle=arXiv.org&rft.au=Nandakumar%20Nambath&rft.date=2020-04-12&rft.eissn=2331-8422&rft_id=info:doi/10.48550/arxiv.1907.10275&rft_dat=%3Cproquest_arxiv%3E2263713386%3C/proquest_arxiv%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2263713386&rft_id=info:pmid/&rfr_iscdi=true