Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact

Across applications, DRAM is a significant contributor to the overall system power, with the DRAM access energy per bit up to three orders of magnitude higher compared to on-chip memory accesses. To improve the power efficiency, DRAM technology incorporates multiple power-down modes, each with diffe...

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Veröffentlicht in:	arXiv.org 2018-03
Hauptverfasser:	Jagtap, Radhika, Jung, Matthias, Elsasser, Wendy, Weis, Christian, Hansson, Andreas, Wehn, Norbert
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer Science - Hardware Architecture Computer simulation Controllers Power efficiency Tradeoffs Workloads
Online-Zugang:	Volltext
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