Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems

In this paper, we introduce a software-defined framework that enables the parallel utilization of all the programmable processing resources available in heterogeneous system-on-chip (SoC) including FPGA-based hardware accelerators and programmable CPUs. Two platforms with different architectures are...

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Hauptverfasser: Nunez-Yanez, Jose, Hosseinabady, Mohammad, Amiri, Moslem, Rodríguez, Andrés, Asenjo, Rafael, Navarro, Angeles, Gran-Tejero, Rubén, Suárez-Gracia, Darío
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Sprache:eng
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