Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)

We present CLEAR (Cross-Layer Exploration for Architecting Resilience), a first of its kind framework which overcomes a major challenge in the design of digital systems that are resilient to reliability failures: achieve desired resilience targets at minimal costs (energy, power, execution time, are...

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Veröffentlicht in:	arXiv.org 2017-09
Hauptverfasser:	Cheng, Eric, Mirkhani, Shahrzad, Szafaryn, Lukasz G, Chen-Yong, Cher, Cho, Hyungmin, Skadron, Kevin, Stan, Mircea R, Lilja, Klas, Abraham, Jacob A, Bose, Pradip, Mitra, Subhasish
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Circuits Computer architecture Computer Science - Hardware Architecture Core hardenability Cost engineering Digital systems Energy costs Exploration Microprocessors Radiation effects Resilience Single event upsets Soft errors Terrestrial environments
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