Fast Monte Carlo Estimation of Timing Yield: Importance Sampling with Stochastic Logical Effort (ISLE)

In the nano era in integrated circuit fabrication technologies, the performance variability due to statistical process and circuit parameter variations is becoming more and more significant. Considerable effort has been expended in the EDA community during the past several years in trying to cope wi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Bayrakci, Alp Arslan, Demir, Alper, Tasiran, Serdar
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer Science - Other Computer Science
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!