A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations
This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-re...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 10240 |
|---|---|
| container_issue | |
| container_start_page | 10240 |
| container_title | |
| container_volume | |
| creator | Chen, Tom W. Gregg, Justin |
| description | This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-regulating mechanism, allowing biasing voltage adjustments on a per well basis. The scheme requires only one bias voltage distribution network, but allows for back biasing adjustments to more effectively mitigate die-to-die and within-die process variations. The biasing setting for each well is determined using a modified genetic algorithm. Our experimental results show that binning yields as low as 17% can be improved to greater than 90% after using the proposed IWABB method. |
| doi_str_mv | 10.5555/968878.969035 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>acm</sourceid><recordid>TN_cdi_acm_books_10_5555_968878_969035</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>acm_books_10_5555_968878_969035</sourcerecordid><originalsourceid>FETCH-acm_books_10_5555_968878_9690353</originalsourceid><addsrcrecordid>eNqVj8tOwzAQRS0hJB7tkv2sEEikOKRJk2VSiqjURQWILq1pPCGmiY1stxX_wseSqP0AuJu7mDMzOoxdhXwUd7nPkjSdpKMsyXgUn7ALPkmy-IGncXzGhs598i5RNg6T8Tn7yWFh9jA1zsNcS7VTcotNsKKmgVzil1c7gsLIbygUOriZr_KiuIXXsqaWoDIWFoQb_CBYmj1ZeCG5Lb0yGlBLWJLtkBZ1STDTdd8taQ9Kg6-7FUuO-pmpuufeYvCoCN7RKuxPuAE7rbBxNDz2Jbt-mr1NnwMsW7E2ZuNEyEXvLA7O4uAc_QO8-xMo1lZRFf0CKIBo1A</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Chen, Tom W. ; Gregg, Justin</creator><creatorcontrib>Chen, Tom W. ; Gregg, Justin</creatorcontrib><description>This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-regulating mechanism, allowing biasing voltage adjustments on a per well basis. The scheme requires only one bias voltage distribution network, but allows for back biasing adjustments to more effectively mitigate die-to-die and within-die process variations. The biasing setting for each well is determined using a modified genetic algorithm. Our experimental results show that binning yields as low as 17% can be improved to greater than 90% after using the proposed IWABB method.</description><identifier>ISBN: 0769520855</identifier><identifier>ISBN: 9780769520858</identifier><identifier>DOI: 10.5555/968878.969035</identifier><language>eng</language><publisher>Washington, DC, USA: IEEE Computer Society</publisher><subject>Hardware -- Hardware test ; Hardware -- Hardware validation ; Hardware -- Hardware validation -- Functional verification ; Hardware -- Robustness</subject><ispartof>Proceedings of the conference on Design, automation and test in Europe - Volume 1, 2004, p.10240-10240</ispartof><rights>Copyright (c) 2004 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>309,310,780,784,789,790,27924</link.rule.ids></links><search><creatorcontrib>Chen, Tom W.</creatorcontrib><creatorcontrib>Gregg, Justin</creatorcontrib><title>A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations</title><title>Proceedings of the conference on Design, automation and test in Europe - Volume 1</title><description>This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-regulating mechanism, allowing biasing voltage adjustments on a per well basis. The scheme requires only one bias voltage distribution network, but allows for back biasing adjustments to more effectively mitigate die-to-die and within-die process variations. The biasing setting for each well is determined using a modified genetic algorithm. Our experimental results show that binning yields as low as 17% can be improved to greater than 90% after using the proposed IWABB method.</description><subject>Hardware -- Hardware test</subject><subject>Hardware -- Hardware validation</subject><subject>Hardware -- Hardware validation -- Functional verification</subject><subject>Hardware -- Robustness</subject><isbn>0769520855</isbn><isbn>9780769520858</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2004</creationdate><recordtype>conference_proceeding</recordtype><sourceid/><recordid>eNqVj8tOwzAQRS0hJB7tkv2sEEikOKRJk2VSiqjURQWILq1pPCGmiY1stxX_wseSqP0AuJu7mDMzOoxdhXwUd7nPkjSdpKMsyXgUn7ALPkmy-IGncXzGhs598i5RNg6T8Tn7yWFh9jA1zsNcS7VTcotNsKKmgVzil1c7gsLIbygUOriZr_KiuIXXsqaWoDIWFoQb_CBYmj1ZeCG5Lb0yGlBLWJLtkBZ1STDTdd8taQ9Kg6-7FUuO-pmpuufeYvCoCN7RKuxPuAE7rbBxNDz2Jbt-mr1NnwMsW7E2ZuNEyEXvLA7O4uAc_QO8-xMo1lZRFf0CKIBo1A</recordid><startdate>20040216</startdate><enddate>20040216</enddate><creator>Chen, Tom W.</creator><creator>Gregg, Justin</creator><general>IEEE Computer Society</general><scope/></search><sort><creationdate>20040216</creationdate><title>A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations</title><author>Chen, Tom W. ; Gregg, Justin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-acm_books_10_5555_968878_9690353</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Hardware -- Hardware test</topic><topic>Hardware -- Hardware validation</topic><topic>Hardware -- Hardware validation -- Functional verification</topic><topic>Hardware -- Robustness</topic><toplevel>online_resources</toplevel><creatorcontrib>Chen, Tom W.</creatorcontrib><creatorcontrib>Gregg, Justin</creatorcontrib></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Chen, Tom W.</au><au>Gregg, Justin</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations</atitle><btitle>Proceedings of the conference on Design, automation and test in Europe - Volume 1</btitle><date>2004-02-16</date><risdate>2004</risdate><spage>10240</spage><epage>10240</epage><pages>10240-10240</pages><isbn>0769520855</isbn><isbn>9780769520858</isbn><abstract>This paper presents a new method of adapting body biasing on a chip during post-fabrication testing in order to mitigate the effects of process variations. Individual well biasing voltages can be changed to be connected either to a chip wide well bias or to a different bias voltage through a self-regulating mechanism, allowing biasing voltage adjustments on a per well basis. The scheme requires only one bias voltage distribution network, but allows for back biasing adjustments to more effectively mitigate die-to-die and within-die process variations. The biasing setting for each well is determined using a modified genetic algorithm. Our experimental results show that binning yields as low as 17% can be improved to greater than 90% after using the proposed IWABB method.</abstract><cop>Washington, DC, USA</cop><pub>IEEE Computer Society</pub><doi>10.5555/968878.969035</doi></addata></record> |
| fulltext | fulltext |
| identifier | ISBN: 0769520855 |
| ispartof | Proceedings of the conference on Design, automation and test in Europe - Volume 1, 2004, p.10240-10240 |
| issn | |
| language | eng |
| recordid | cdi_acm_books_10_5555_968878_969035 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Hardware -- Hardware test Hardware -- Hardware validation Hardware -- Hardware validation -- Functional verification Hardware -- Robustness |
| title | A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T02%3A55%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-acm&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20Low%20Cost%20Individual-Well%20Adaptive%20Body%20Bias%20(IWABB)%20Scheme%20for%20Leakage%20Power%20Reduction%20and%20Performance%20Enhancement%20in%20the%20Presence%20of%20Intra-Die%20Variations&rft.btitle=Proceedings%20of%20the%20conference%20on%20Design,%20automation%20and%20test%20in%20Europe%20-%20Volume%201&rft.au=Chen,%20Tom%20W.&rft.date=2004-02-16&rft.spage=10240&rft.epage=10240&rft.pages=10240-10240&rft.isbn=0769520855&rft.isbn_list=9780769520858&rft_id=info:doi/10.5555/968878.969035&rft_dat=%3Cacm%3Eacm_books_10_5555_968878_969035%3C/acm%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |